From 39ec744562da0fefc66b61c9c75ab5fc895a7f51 Mon Sep 17 00:00:00 2001 From: Danila Fedorin Date: Wed, 17 Mar 2021 12:21:35 -0700 Subject: [PATCH] Update report. --- final/report.tex | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/final/report.tex b/final/report.tex index d6167bb..c6b28c9 100644 --- a/final/report.tex +++ b/final/report.tex @@ -282,7 +282,7 @@ the vertical wires, \textsc{Bt} and \textsc{Bf}. This allowed me to use metal fo \textsc{Wl} (access) signal. Since this was the only use of metal four, I had enough free room to route thee additional \textsc{Wl} signals to the remaining three columns. -My general principle for designing the layout was that, in an 8-bit, 4-column design, \textbf{a single +My general principle for designing the layout was that, in an 12-bit, 4-column design, \textbf{a single unit of height costs as much as 64 units of width}. Thus, I was fairly liberal with my layout's width, but made sure to minimize the height of the design. The most significant bottleneck was the gate oxide ``poking out'' of the ends of the design. In total, I was able to achieve