From 76899cb8a3b7e8a26cf918dea50b464f597f588f Mon Sep 17 00:00:00 2001 From: Danila Fedorin Date: Tue, 16 Mar 2021 15:44:09 -0700 Subject: [PATCH] 2ns with flops. --- final/SRAM_bits.cir | 30 ++++++++++++++++++++++-------- final/testBuffer.cir | 13 ++++++++++--- 2 files changed, 32 insertions(+), 11 deletions(-) diff --git a/final/SRAM_bits.cir b/final/SRAM_bits.cir index b3249f5..9d40515 100644 --- a/final/SRAM_bits.cir +++ b/final/SRAM_bits.cir @@ -169,17 +169,31 @@ Xclk clkb clk inv size='25' Xdii diib dii inv size='25' Xrwt rwtb rwt inv size='25' Xrwn dorw clkb rwt nor2 size='50' -Xdt pdt dii gnd nn ww='30' -Xdf pdf diib gnd nn ww='30' -Xwt btt dorw pdt nn ww='30' -Xwf bff dorw pdf nn ww='30' +Xdt pdt dii gnd nn ww='100' +Xdf pdf diib gnd nn ww='100' +Xwt btt dorw pdt nn ww='100' +Xwf bff dorw pdf nn ww='100' Xpcet pcet rwtb clk diib precharge Xpcef pcef rwtb clk dii precharge -Xpct btt clk vdd pp ww='30' -Xpcf bff clk vdd pp ww='30' +Xpct btt clk vdd pp ww='100' +Xpcf bff clk vdd pp ww='100' .ends write1 - +.subckt iWrite1 btt bff dii rwt clk +* TODO: sizes +Xclk clkb clk inv size='40' +Xdii diib dii inv size='40' +Xrwt rwtb rwt inv size='40' +Xrwn dorw clkb rwt nor2 size='110' +Xdt pdt dii gnd nn ww='300' +Xdf pdf diib gnd nn ww='300' +Xwt btt dorw pdt nn ww='300' +Xwf bff dorw pdf nn ww='300' +Xpcet pcet rwtb clk diib precharge +Xpcef pcef rwtb clk dii precharge +Xpct btt pcet vdd pp ww='100' +Xpcf bff pcef vdd pp ww='100' +.ends write1 .subckt read1 btt bff dot rwt clk Xnd trigger rwt clk nnd2 @@ -208,7 +222,7 @@ Xamp set rst btt bff triggerb senseAmp size='200' .subckt iReadSub btt bff set rst rwt clk en Xnd trigger rwt en clk nnd3 Xinv triggerb trigger inv size='40' -Xamp set rst btt bff triggerb iSenseAmp size='200' +Xamp set rst btt bff triggerb iSenseAmp size='40' .ends read1 .subckt readcollect dot set0 rst0 set1 rst1 set2 rst2 set3 rst3 diff --git a/final/testBuffer.cir b/final/testBuffer.cir index e2e484c..ec9bdd9 100644 --- a/final/testBuffer.cir +++ b/final/testBuffer.cir @@ -21,10 +21,10 @@ Xnf fff gnd dead nn ww='number*5' *********begin: topLevel***** -.param per = 1.2ns +.param per = 2ns .param dataLead=per*0.1 .param lw=2000 -.param wirew=8 +.param wirew=12 vdd vdd 0 'supply' @@ -33,13 +33,20 @@ Xad ad dat1 period='per' start='per' total=1 duty=0.5 sz=300 Xrdwr rdw dat1 period='2*per' start='2*per' total=2 duty=1 sz=300 Xdii din dat1 period='2*per' start='per' total=4 duty=2 sz=300 +Xinv1 clkb1 clk inv +Xinv2 clkb2 clkb1 inv +Xinv3 clkb3 clkb2 inv +Xinv4 clkb4 clkb3 inv +Xinv5 clkb5 clkb4 inv +Xinv6 clkb6 clkb5 inv size='500' + Xad adf ad clk flop Xdinff dinf din clk flop Xrdwff rdwf rdw clk flop Xrotff dotf dot clk flop Xdec choose adf clk decModel -Xwr bt3 bf3 din rdw clk write1 +Xwr bt3 bf3 dinf rdwf clkb6 iWrite1 Xw1 bt1 bt2 bf1 bf2 clk wire_precharge len='lw/4' wid='wirew' Xmd1 bt2 bf2 memLoad number=15 Xw2 bt2 bt3 bf2 bf3 clk wire_precharge len='lw/4' wid='wirew'