From c866f63e8c74ccb6547aedcc7501570999fedd82 Mon Sep 17 00:00:00 2001 From: Danila Fedorin Date: Mon, 15 Mar 2021 15:17:04 -0700 Subject: [PATCH] 1.3 nanoseconds --- final/SRAM_bits.cir | 2 +- final/testBuffer.cir | 14 +++++++++----- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/final/SRAM_bits.cir b/final/SRAM_bits.cir index 4a9f060..299d3e4 100644 --- a/final/SRAM_bits.cir +++ b/final/SRAM_bits.cir @@ -190,7 +190,7 @@ Xh2 nn1 dot inv .subckt readSub btt bff set rst rwt clk en Xnd trigger rwt clk en nnd3 Xinv triggerb trigger inv size='40' -Xamp set rst btt bff triggerb senseAmp size='40' +Xamp set rst btt bff triggerb senseAmp size='200' .ends read1 .subckt readcollect dot set0 rst0 set1 rst1 set2 rst2 set3 rst3 diff --git a/final/testBuffer.cir b/final/testBuffer.cir index d5f9840..0b43623 100644 --- a/final/testBuffer.cir +++ b/final/testBuffer.cir @@ -21,7 +21,7 @@ Xnf fff gnd dead nn ww='number*5' *********begin: topLevel***** -.param per = 1.15ns +.param per = 1.3ns .param dataLead=per*0.1 .param lw=1800 .param wirew=12 @@ -29,10 +29,14 @@ Xnf fff gnd dead nn ww='number*5' vdd vdd 0 'supply' Xclok clk dat1 period='per' start='per+dataLead' total=1 duty=0.5 sz=50 -Xrdwr rdw dat1 period='per' start='2*per' total=2 duty=1 -Xdii din dat1 period='per' start='per' total=4 duty=2 sz=30 -Xdec choose clk clk decModel +Xad ad dat1 period='per' start='per' total=1 duty=0.5 sz=100 +Xrdwr rdw dat1 period='per' start='2*per' total=2 duty=1 sz=100 +Xdii din dat1 period='per' start='per' total=4 duty=2 sz=100 +Xad adf ad clk flop +Xdinff dinf din clk flop +Xrdwff rdwf rdw clk flop +Xdec choose adf clk decModel Xwr bt3 bf3 din rdw clk write1 Xw1 bt1 bt2 bf1 bf2 clk wire_precharge len='lw/4' wid='wirew' @@ -43,7 +47,7 @@ Xw3 bt3 bt4 bf3 bf4 clk wire_precharge len='lw/4' wid='wirew' Xmd3 bt4 bf4 memLoad number=16 Xw4 bt4 btt bf4 bff clk wire_precharge len='lw/4' wid='wirew' Xmd4 btt bff memLoad number =16 -Xla bt1 bf1 clk mem1 +Xla bt1 bf1 choose mem1 Xrd btt bff set rst rdw clk choose readSub Xrc dot set rst vdd vdd vdd vdd vdd vdd readCollect