67 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			TeX
		
	
	
	
	
	
		
		
			
		
	
	
			67 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			TeX
		
	
	
	
	
	
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								\documentclass{article}
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								\usepackage[margin=1in]{geometry}
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								\usepackage{amsmath}
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								\usepackage{graphicx}
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								\begin{document}
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								\section*{Lab 2}
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								The data gathered in this lab is listed in tables
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								1 and 2.
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								\begin{figure}[h]
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								    \centering
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								    \begin{tabular}{lcccccc}
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								        Node & $g_m$ (S) & $r_o$ ($\Omega$) & Gain & $I_\text{off} (A)$ & $I_\text{on} (A)$ & $I_\text{on}/I_\text{off}$ \\
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								        \hline
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								        longchannel pmos & 4.01E-04 & 1.36E+04 & 5.457 & 1.02E-11 & 1.36E-03 & 1.34E+08 \\
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								        longchannel nmos & 9.13E-04 & 1.31E+04 & 11.95 & 1.12E-11 & 3.22E-03 & 2.87E+08 \\
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								        50nm pmos & 2.11E-04 & 1.55E+04 & 3.259 & 8.84E-09 & 1.48E-04 & 1.68E+04 \\
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								        50nm nmos & 4.44E-04 & 1.31E+04 & 5.793 & 3.64E-09 & 3.12E-04 & 8.55E+04 \\
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								        16nmlp pmos & 1.62E-04 & 1.68E+04 & 2.72 & 2.30E-11 & 5.54E-05 & 2.40E+06 \\
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								        16nmlp nmos & 2.88E-04 & 1.33E+04 & 3.83 & 8.87E-12 & 9.13E-05 & 1.03E+07 \\
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								        16nmhp pmos & 3.33E-04 & 5.37E+03 & 1.787 & 9.22E-08 & 1.51E-04 & 1.64E+03 \\
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								        16nmhp nmos & 4.95E-04 & 5.56E+03 & 2.755 & 7.41E-08 & 2.17E-04 & 2.93E+03 \\
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								    \end{tabular}
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								    \label{fig:dc}
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								    \caption{Properties of various transistor sizes and types}
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								\end{figure}
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								\begin{figure}[h]
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								    \centering
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								    \begin{tabular}{lcccccc}
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								        Node & Oscillation Period (ps) & Oscillation Frequency (GHz) \\
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								        \hline
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								        longchannel & 1020 & 0.980 \\
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								        50nm & 222 & 4.49 \\
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								        16nmlp & 140 & 7.11 \\
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								        16nmhp & 32.2 & 31.0 \\
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								    \end{tabular}
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								    \label{fig:t}
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								    \caption{Switching frequency of 5-long inverter loop.}
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								\end{figure}
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								From these tables, we can see that smaller transistors have progressively smaller
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								gain, and progressively smaller ratios of on current $I_\text{on}$ and off current
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								$I_\text{off}$. We can explain the drop in gain with velocity saturation. At smaller
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								scales, short-channel effects make the relationship between current and gate voltage no longer
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								quadratic, but linear (and thus smaller in magnitude). This means that the transconductance
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								of a transistor decreases as it gets smaller, leading to lower gain. Furthermore,
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								due to short-channel effects such as impact ionization, current doesn't stop increasing
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								past the theoretical saturation point. This makes the transistor behave less like
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								a current source past saturation, and decreases gain.
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								Decreasing the size of the transistor does, however, significantly improve its timing characteristics.
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								While at 1$\mu m$ the 5-transistor loop we simulated has an oscillation frequency of 0.98GHz, the 16nm
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								high power loop can go as fast as 31GHz. This is likely due to the decreased capacitances at
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								this scale: it takes less time to charge up any part of the CMOS logic, including the outputs,
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								which makes it possible for subsequent transistors to respond faster, and so on.
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								For analog circuits, we care about gain, since we want to ensure that our signal is transmitted
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								properly through our circuit. Thus, bigger transistors are probably better suited for this application,
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								since they have higher (sometimes much higher) gains than smaller transistors. On the other hand,
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								from the digital side, the gain doesn't matter as much as the performance characteristics of the transistor,
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								which makes the smaller nodes (ones that we measured to have higher oscillation frequency) preferable. 
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								\end{document}
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