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Prove another (simple) case

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Signed-off-by: Danila Fedorin <danila.fedorin@gmail.com>
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Danila Fedorin 2024-04-28 13:37:03 -07:00
parent aec15573fc
commit bbfba34e05
1 changed files with 14 additions and 0 deletions
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Language/Properties.agda
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@ -140,6 +140,17 @@ EndToEndTrace-loop² {g} etr₁ etr₂ = record
EndToEndTrace.trace etr₁ ++⟨ oi∈es ⟩ EndToEndTrace.trace etr₂
}
Trace-optional : ∀ {g : Graph} {idx₁ idx₂ : Graph.Index g} {ρ₁ ρ₂ : Env} →
Trace {g} idx₁ idx₂ ρ₁ ρ₂ → Trace {optional g} (2 Fin.↑ʳ idx₁) (2 Fin.↑ʳ idx₂) ρ₁ ρ₂
Trace-optional = {!!}
EndToEndTrace-optional : ∀ {g : Graph} {ρ₁ ρ₂ : Env} →
EndToEndTrace {g} ρ₁ ρ₂ → EndToEndTrace {optional g} ρ₁ ρ₂
EndToEndTrace-optional = {!!}
EndToEndTrace-optional-ε : ∀ {g : Graph} {ρ : Env} → EndToEndTrace {optional g} ρ ρ
EndToEndTrace-optional-ε = {!!}
infixr 5 _++_
_++_ : ∀ {g₁ g₂ : Graph} {ρ₁ ρ₂ ρ₃ : Env} →
EndToEndTrace {g₁} ρ₁ ρ₂ → EndToEndTrace {g₂} ρ₂ ρ₃ →
@ -189,3 +200,6 @@ buildCfg-sufficient (⇒ˢ-if-false ρ₁ ρ₂ _ s₁ s₂ _ ρ₁,s₂⇒ρ₂
Trace-singleton[] ρ₁ ++
(EndToEndTrace-∙ʳ {buildCfg s₁} (buildCfg-sufficient ρ₁,s₂⇒ρ₂)) ++
Trace-singleton[] ρ₂
buildCfg-sufficient (⇒ˢ-while-true ρ₁ ρ₂ ρ₃ _ _ s _ _ ρ₁,s⇒ρ₂ ρ₂,ws⇒ρ₃) = {!!}
buildCfg-sufficient (⇒ˢ-while-false ρ _ s _) =
EndToEndTrace-optional-ε {loop (buildCfg s)} {ρ}