ECE-571/Labs
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Update report.

Browse Source
This commit is contained in:
Danila Fedorin 2021-03-17 12:21:35 -07:00
parent 6530e7ef8c
commit 39ec744562
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
final/report.tex
View File

@ -282,7 +282,7 @@ the vertical wires, \textsc{Bt} and \textsc{Bf}. This allowed me to use metal fo
\textsc{Wl} (access) signal. Since this was the only use of metal four, I had enough free
room to route thee additional \textsc{Wl} signals to the remaining three columns.
My general principle for designing the layout was that, in an 8-bit, 4-column design, \textbf{a single
My general principle for designing the layout was that, in an 12-bit, 4-column design, \textbf{a single
unit of height costs as much as 64 units of width}. Thus, I was fairly liberal with my layout's
width, but made sure to minimize the height of the design. The most significant bottleneck
was the gate oxide ``poking out'' of the ends of the design. In total, I was able to achieve