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ECE-271
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VerilogCPU
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Danila Fedorin
bfe4b65788
Fix a port width problem, and change file permissions.
2018-06-05 22:56:46 -07:00
Danila Fedorin
d183a7e1de
Add inputs and an instruction to read from them.
2018-06-05 18:58:46 -07:00
Danila Fedorin
6bceee5e68
Initial commit. Working CPU!
2018-06-05 00:06:45 -07:00