A CPU written in SystemVerilog for ECE 271.
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

27 lines
524 B

* A four-input multiplexer.
module mux4 #(width=32)
(input logic [width-1:0] first, second, third, fourth,
input logic [1:0] select,
output logic [width-1:0] out);
logic [width-1:0] lower, upper;
mux2 lower_mux(
mux2 upper_mux(
mux2 final_mux(