ECE-570/Report
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Update report.

Browse Source
This commit is contained in:
Danila Fedorin 2020-12-07 15:51:17 -08:00
parent 5836f04b36
commit ecbc2a551a
1 changed files with 9 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
report.tex
View File

@ -44,7 +44,7 @@ As expected, the two stateless predictors, \emph{Taken}
and \emph{Not Taken}, perform significantly worse than the and \emph{Not Taken}, perform significantly worse than the
others. These predictors do not keep track of the behavior others. These predictors do not keep track of the behavior
of various branches, and thus have limited ability of various branches, and thus have limited ability
to predict the direction of a branch. Out of the stateful to predict the direction or target of a branch. Out of the stateful
predictors, the \emph{2-level} predictor seems to perform the worst. predictors, the \emph{2-level} predictor seems to perform the worst.
Unsurprisingly, the \emph{Combined} predictor, which is Unsurprisingly, the \emph{Combined} predictor, which is
a combination of the other two stateful predictors, performs a combination of the other two stateful predictors, performs
@ -102,7 +102,9 @@ since the code in \texttt{sim-outorder.c} converts zero to \texttt{PC+1}),
or, in the case of unconditional jumps, it returns the expected target or, in the case of unconditional jumps, it returns the expected target
address (zero), which is \textit{also} \texttt{PC+1}! The fact that address (zero), which is \textit{also} \texttt{PC+1}! The fact that
the two predictors have the same address prediction rate seems the two predictors have the same address prediction rate seems
to be due to the ``FIXME'' in the simulator code. to be due to the ``FIXME'' in the simulator code. By the way,
I write \texttt{PC+1} to mean ``the next program counter'', since
I do not know the width in bytes of the simulated instructions.
\section*{Part 2: IPC Benchmarks} \section*{Part 2: IPC Benchmarks}
In this section, we present the IPC results from the previously listed In this section, we present the IPC results from the previously listed
@ -212,6 +214,11 @@ tolerate at most one use of the wrong branch predictor before
switching to the other (if the current predictor is ``strongly'' switching to the other (if the current predictor is ``strongly''
predicted). predicted).
Of course, a combined predictor need not specifically consist of
a bimodal and a 2-level predictor. This approach can be applied
to combine any two predictors. However, in the code for the simulator,
it seems like only this specific combination is possible.
\section*{Part 5 - 3-Bit Branch Predictor} \section*{Part 5 - 3-Bit Branch Predictor}
For this part, I modified the SimpleScalar codebase to add For this part, I modified the SimpleScalar codebase to add
a 3-bit branch predictor. The code will be included with this a 3-bit branch predictor. The code will be included with this