88 lines
3.9 KiB
TeX
88 lines
3.9 KiB
TeX
\documentclass{article}
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\usepackage[margin=1in]{geometry}
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\title{Homework 1}
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\begin{document}
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\maketitle
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\section*{Q1}
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The three version of Moore's Law are as follows:
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\begin{itemize}
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\item \textbf{Scaling Up}. We were able to shrink the size
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of a transistor, thereby roughly doubling the number of transistors
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on a single chip every 1-2 years.
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\item \textbf{Scaling Down}. The costs of a single
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transistor decreased by about 30\% every year.
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This made it cost-effective to use microprocessors
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for various applications.
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\item \textbf{Scaling Out}. We are able to combine
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microprocessors with other technologies, even
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entirely in our silicon processing. For instance,
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we can make tiny accelerometers, or use a saphire
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substrate instead of silicon to work with
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light.
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\end{itemize}
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\section*{Q2}
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According to Denard scaling, power density remains constant.
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If this holds, we can scale down our designs and things
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will continue to just work.
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\section*{Q3}
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We were not able to scale voltage at the desired factor. Eventually,
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thermally-induced voltages are comparable in magnitude with the voltages
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we use to drive our transistors, which makes them work unreliably or leak
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charge. Because we can no longer scale voltage down, our power density
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keeps growing. This means that our processors get increasingly hot,
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which, in turn, limits the clock speeds of our designs.
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\section*{Q4}
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A wafer is first covered in Photoresist, a chemical that is
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either soluble until or before it comes into contact with UV light.
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UV light is shined onto the photoresist past a mask, which creates
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regions that are exposed to UV (where not blocked by the mask) and regions
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that are in ``shadow'' (blocked by the mask). Depending on the type of
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photoresist, one of the regions (but not the other) becomes soluble,
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and can be removed using a solvent (developer). This leaves a pattern
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of photoresist on top of the wafer. Different approaches can then
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be used that affect only the areas not covered by photoresist (for instance,
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if gold is below the photoresist layer, a chemical can be used to
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dissolve the gold; the chemical will not touch the gold covered by
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photoresist, thus leaving it in place).
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\pagebreak
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\section*{Q5}
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Not quite sure what this question means, but I have a few thoughts:
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\begin{itemize}
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\item Instead of trying to reduce the wavelength of light further
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down (which didn't actually work out), we use the same old
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193nm light, and focused on refining the technique.
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\item We started to perform multiple lithography (and maybe etch)
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steps for a single layer, which made it possible to
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halve (or further reduce) the minimum pitch. Exposing
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photoresist more than once also made it possible (from what I can tell) to use all the special
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techniques (off-axis illumination, immersion, RET), which otherwise constrain masks to being only
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horizontal or only vertical.
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\item Self-aligned mutli-patterning techniques cannot really lay down
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``holes'' in lines; these holes have to be added later.
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As a result, layouts of modern CPUs are very regular,
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since many components ``share'' a single line. This
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allows for far less freedom in where to place the
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various components of a chip.
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\end{itemize}
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\section*{Q6}
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From the ``Rosetta Stone of Lithography'' it looks like with true double patterning,
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the smallest we can get is the 10nm node (50nm pitch).
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However, the Breakfast Bytes article, right after saying 50nm is the smallest
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pitch we can get with double patterning, brings up SADP, which is also
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double patterning, but can go as low as 40nm. In the Rosetta Stone,
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however, 40nm seems to correspond to `Higher-order pitch division', and not
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double patterning, so I still think 50nm pitch / 10nm node is the answer here.
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\section*{Q7}
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We use tin plasma! Apparently, tin is ``fairly efficient'' at converting laser
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light into EUV.
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\end{document}
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