Add comments.

memory.sv

@@ -1,3 +1,9 @@
+/**
+ * CPU-specific memory. raddr is used for reading,
+ * while wen (write enable), waddr, and in are used in combination to write.
+ * Reads are performed immediately, but writes are performed on
+ * positive clock edge. Reset clears the memory to 0.
+ */
 module memory #(width=32)
 				(input logic [7:0] raddr, waddr,
 				 input logic [width-1:0] in,
@@ -8,10 +14,10 @@ module memory #(width=32)
 		if(reset) begin
 			data <= '{default: 0};
 		end else begin
-			if(wen) begin 
+			if(wen) begin
 				data[waddr] <= in;
 			end
 		end
-	
+
 	assign out = data[raddr];
-endmodule
+endmodule