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base: ECE-571:cf73ec9016bf454354f3fd3ae3e2b152d1768f19
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ECE-571:master
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compare: ECE-571:8b9eabdec1e9faded6a921697035efdde10b53dc
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ECE-571:master

14 Commits
cf73ec9016 ... 8b9eabdec1

Author SHA1 Message Date
Danila Fedorin
8b9eabdec1 1.33ns with flip flops and bug mitigation 2021-03-16 16:30:28 -07:00
Danila Fedorin
e077bb9071 1.35ns with flip flops and bug mitigation 2021-03-16 16:20:35 -07:00
Danila Fedorin
76899cb8a3 2ns with flops. 2021-03-16 15:44:09 -07:00
Danila Fedorin
12856ef152 Use improved senseamp to strengthen performance. 2021-03-16 14:28:24 -07:00
Danila Fedorin
ca72f3eb3d Rollback to 1.3ns and no write flops. 2021-03-16 12:22:50 -07:00
Danila Fedorin
e5b0166d8c With flip flops. 2021-03-15 22:24:43 -07:00
Danila Fedorin
8ba9d02a8e 1.24ns 2021-03-15 16:02:04 -07:00
Danila Fedorin
c866f63e8c 1.3 nanoseconds 2021-03-15 15:17:04 -07:00
Danila Fedorin
f3ffb39219 Write-in-middle design. 2021-03-14 23:11:00 -07:00
Danila Fedorin
f289e84389 Current best effort. 2021-03-14 21:13:43 -07:00
Danila Fedorin
5f8a49ab9a WIP (still buggy) 2ns design 2021-03-12 13:53:24 -08:00
Danila Fedorin
2010fcdf52 Add initial version of SRAM design. 2021-03-09 19:15:39 -08:00
Danila Fedorin
8285087e3f Add Scott's various test files. 2021-03-09 19:15:28 -08:00
Danila Fedorin
b58f4df33e Add my initial definitions of SRAM bits. 2021-03-09 19:15:07 -08:00
10 changed files with 1650 additions and 0 deletions
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# header information:
HSRAM|9.07
# Views:
Vlayout|lay
Vschematic|sch
# Cell cell;1{lay}
Ccell;1{lay}||mocmos|1614200654750|1614206930591||DRC_last_good_drc_area_date()G1614206933510|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1614206933510
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-Polysilicon-1-Con|contact@0||-14|-6||||
NMetal-1-Polysilicon-1-Con|contact@1||-4|-3||||
NMetal-1-P-Active-Con|contact@2||1|4||||
NMetal-1-P-Active-Con|contact@3||-9|4||||
NMetal-1-N-Active-Con|contact@4||-9|-13||||
NMetal-1-N-Active-Con|contact@5||1|-13||||
NMetal-1-Metal-2-Con|contact@6||1|4||||
NMetal-1-Metal-2-Con|contact@7||1|-13||||
NMetal-1-Metal-2-Con|contact@8||-14|-6||||
NMetal-1-Metal-2-Con|contact@9||-6|-3||||
NMetal-2-Metal-3-Con|contact@10||-6|-3||||
NMetal-1-P-Active-Con|contact@11||-19|4||||
NMetal-1-N-Active-Con|contact@12||-19|-13||||
NMetal-1-Metal-2-Con|contact@13||-21|-13||||
NMetal-1-Metal-2-Con|contact@14||-21|4||||
NMetal-2-Metal-3-Con|contact@15||-21|-3||||
NMetal-1-Metal-2-Con|contact@17||-9|4||||
NMetal-2-Metal-3-Con|contact@18||-9|4||||
NMetal-1-Metal-2-Con|contact@19||-9|-17||||
NMetal-2-Metal-3-Con|contact@20||-9|-17||||
NMetal-3-Metal-4-Con|contact@21||-9|-17||||
NMetal-3-Metal-4-Con|contact@22||-9|4||||
NMetal-1-Polysilicon-1-Con|contact@23||-26|-6||||
NMetal-1-Metal-2-Con|contact@39||-28|4||||
NMetal-2-Metal-3-Con|contact@40||-28|4||||
NMetal-3-Metal-4-Con|contact@41||-28|4||||
NMetal-1-Metal-2-Con|contact@44||-28|-6||||
NMetal-2-Metal-3-Con|contact@45||-28|-6||||
NMetal-3-Metal-4-Con|contact@46||-28|-6||||
NMetal-1-N-Active-Con|contact@52||-28|-13||||
NMetal-1-N-Active-Con|contact@53||11|-13||||
NMetal-1-Metal-2-Con|contact@54||-35|-13||||
NMetal-1-Metal-2-Con|contact@55||-35|9||||
NMetal-1-Metal-2-Con|contact@59||13|-13||||
NMetal-2-Metal-3-Con|contact@60||15|-13||||
NMetal-1-Polysilicon-1-Con|contact@62||9|-6||||
NMetal-1-Metal-2-Con|contact@63||9|-6||||
NMetal-2-Metal-3-Con|contact@64||8|-6||||
NMetal-3-Metal-4-Con|contact@65||8|-6||||
NMetal-1-Metal-2-Con|contact@67||22|-17||||
NMetal-2-Metal-3-Con|contact@68||22|-17||||
NMetal-3-Metal-4-Con|contact@69||22|-17||||
NMetal-2-Metal-3-Con|contact@70||22|-17||||
NN-Transistor|nmos@0||-14|-13|2||R|
NN-Transistor|nmos@1||-4|-13|2||R|
NN-Transistor|nmos@2||-23|-13|2||R|
NN-Transistor|nmos@3||6|-13|2||R|
NMetal-2-Pin|pin@0||-14|-10||||
NMetal-2-Pin|pin@1||1|-10||||
NMetal-2-Pin|pin@2||-21|-3||||
NPolysilicon-1-Pin|pin@3||-23|-6||||
NMetal-4-Pin|pin@4||14|4||||
NMetal-4-Pin|pin@5||-29|-17||||
NMetal-4-Pin|pin@7||14|4||||
NMetal-4-Pin|pin@8||14|-17||||
NPolysilicon-1-Pin|pin@14||6|-6||||
NMetal-4-Pin|pin@15||14|-6||||
NMetal-1-Pin|pin@16||-35|-13||||
NMetal-1-Pin|pin@17||-35|9||||
NMetal-1-Pin|pin@18||-35|-13||||
NMetal-3-Pin|pin@20||15|8||||
NMetal-1-Pin|pin@22||20|-17||||
NMetal-3-Pin|pin@23||15|-19||||
NN-Well-Node|plnode@0||-29|4|12|12||A
NP-Transistor|pmos@0||-14|4|2||RRR|
NP-Transistor|pmos@1||-4|4|2||RRR|
NMetal-1-P-Well-Con|substr@0||20|-16||||
NMetal-1-N-Well-Con|well@1||-28|4||||
APolysilicon-1|net@0|||S900|pmos@0|poly-right|-14|-0.5|contact@0||-14|-6
APolysilicon-1|net@1|||S900|contact@0||-14|-6|nmos@0|poly-right|-14|-8.5
APolysilicon-1|net@2|||S2700|contact@1||-4|-3|pmos@1|poly-right|-4|-0.5
APolysilicon-1|net@3|||S900|contact@1||-4|-3|nmos@1|poly-right|-4|-8.5
AP-Active|net@6|||S0|contact@2||1|4|pmos@1|diff-top|-0.25|4
AP-Active|net@7|||S1800|contact@3||-9|4|pmos@1|diff-bottom|-7.75|4
AP-Active|net@8|||S0|contact@3||-9|4|pmos@0|diff-top|-10.25|4
AN-Active|net@9|||S1800|contact@4||-9|-13|nmos@1|diff-top|-7.75|-13
AN-Active|net@10|||S0|contact@4||-9|-13|nmos@0|diff-bottom|-10.25|-13
AN-Active|net@11|||S0|contact@5||1|-13|nmos@1|diff-bottom|-0.25|-13
AMetal-1|net@12||1|S1800|contact@2||1|4|contact@6||1|4
AMetal-1|net@13||1|S1800|contact@5||1|-13|contact@7||1|-13
AMetal-1|net@15||1|S0|contact@0||-14|-6|contact@8||-14|-6
AMetal-2|net@20||1|S2700|contact@7||1|-13|pin@1||1|-10
AMetal-2|net@21||1|S2700|pin@1||1|-10|contact@6||1|4
AMetal-2|net@22||1|S0|pin@1||1|-10|pin@0||-14|-10
AMetal-2|net@23||1|S2700|pin@0||-14|-10|contact@8||-14|-6
AMetal-1|net@24||1|S0|contact@1||-4|-3|contact@9||-5|-3
AMetal-2|net@25||1|S0|contact@9||-6|-3|contact@10||-6|-3
AP-Active|net@26|||S1800|contact@11||-19|4|pmos@0|diff-bottom|-17.75|4
AN-Active|net@27|||S1800|contact@12||-19|-13|nmos@0|diff-top|-17.75|-13
AMetal-1|net@28||1|S1800|contact@13||-21|-13|contact@12||-19|-13
AMetal-1|net@29||1|S1800|contact@14||-21|4|contact@11||-19|4
AMetal-2|net@31||1|S900|contact@14||-21|4|pin@2||-21|-3
AMetal-2|net@32||1|S900|pin@2||-21|-3|contact@13||-21|-13
AMetal-2|net@33||1|S1800|contact@15||-21|-3|pin@2||-21|-3
AN-Active|net@35|||S1800|nmos@2|diff-bottom|-19.25|-13|contact@12||-19|-13
AMetal-1|net@38||1|S2700|contact@3||-9|4|contact@17||-9|4
AMetal-2|net@39||1|S900|contact@18||-9|4|contact@17||-9|4
AMetal-1|net@40||1|S900|contact@4||-9|-13|contact@19||-9|-17
AMetal-2|net@41||1|S900|contact@19||-9|-17|contact@20||-9|-17
AMetal-3|net@42||1|S900|contact@20||-9|-17|contact@21||-9|-17
AMetal-3|net@43||1|S900|contact@22||-9|4|contact@18||-9|4
APolysilicon-1|net@44|||S2700|nmos@2|poly-right|-23|-8.5|pin@3||-23|-6
APolysilicon-1|net@45|||S0|pin@3||-23|-6|contact@23||-26|-6
AMetal-4|net@59||1|S1800|contact@22||-9|4|pin@4||14|4
AMetal-4|net@65||1|S0|contact@21||-9|-17|pin@5||-29|-17
AMetal-1|net@66||1|S0|well@1||-28|4|contact@39||-28|4
AMetal-2|net@67||1|S0|contact@39||-28|4|contact@40||-28|4
AMetal-3|net@68||1|S1800|contact@41||-28|4|contact@40||-28|4
AMetal-4|net@69||1|S0|contact@22||-9|4|contact@41||-28|4
AMetal-4|net@71||1|S0|pin@7||14|4|pin@4||14|4
AMetal-4|net@81||1|S0|pin@8||14|-17|contact@21||-9|-17
AN-Active|net@82|||S1800|contact@5||1|-13|nmos@3|diff-top|2.25|-13
APolysilicon-1|net@83|||S2700|nmos@3|poly-right|6|-8.5|pin@14||6|-6
AMetal-1|net@85||1|S0|contact@23||-26|-6|contact@44||-28|-6
AMetal-2|net@86||1|S0|contact@44||-28|-6|contact@45||-28|-6
AMetal-3|net@87||1|S1800|contact@46||-28|-6|contact@45||-28|-6
AMetal-3|net@95||1|S1800|contact@15||-21|-3|contact@10||-6|-3
AN-Active|net@96|||S1800|contact@52||-28|-13|nmos@2|diff-top|-26.75|-13
AN-Active|net@97|||S0|contact@53||11|-13|nmos@3|diff-bottom|9.75|-13
AMetal-1|net@98|||S0|contact@52||-28|-13|pin@16||-35|-13
AMetal-1|net@99|||S2700|pin@16||-35|-13|pin@17||-35|9
AMetal-1|net@100|||S900|pin@17||-35|9|pin@18||-35|-13
AMetal-1|net@101|||S0|pin@18||-35|-13|contact@54||-35|-13
AMetal-1|net@102|||S1800|contact@55||-35|9|pin@17||-35|9
AMetal-1|net@107||1|S1800|contact@53||11|-13|contact@59||13|-13
AMetal-2|net@108||1|S1800|contact@59||13|-13|contact@60||15|-13
AMetal-3|net@111||1|S2700|contact@60||15|-13|pin@20||15|8
APolysilicon-1|net@112|||S1800|pin@14||6|-6|contact@62||9|-6
AMetal-1|net@113||1|S2700|contact@62||9|-6|contact@63||9|-6
AMetal-2|net@114||1|S0|contact@63||9|-6|contact@64||8|-6
AMetal-3|net@115||1|S2700|contact@64||8|-6|contact@65||8|-6
AMetal-4|net@116||1|S1800|contact@46||-28|-6|contact@65||8|-6
AMetal-4|net@117||1|S1800|contact@65||8|-6|pin@15||14|-6
AMetal-1|net@120||1|S0|contact@67||22|-17|pin@22||20|-17
AMetal-1|net@121||1|S900|substr@0||20|-16|pin@22||20|-17
AMetal-2|net@122||1|S2700|contact@68||22|-17|contact@67||22|-17
AMetal-3|net@123||1|S2700|contact@69||22|-17|contact@70||22|-17
AMetal-2|net@124|||S|contact@67||22|-17|contact@70||22|-17
AMetal-4|net@125||1|S0|contact@69||22|-17|pin@8||14|-17
AMetal-3|net@126||1|S900|contact@60||15|-13|pin@23||15|-19
EBF||D5G2;|pin@20||I
EBT||D5G2;|pin@17||I
EwL|WL|D5G2;|pin@15||I
Egnd||D5G2;|pin@8||G
Evdd||D5G2;|pin@7||P
X
# Cell cell;1{sch}
Ccell;1{sch}||schematic|1614200043324|1614200704603|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-18|15|||RRR|
NOff-Page|conn@1||-32|6||||
NOff-Page|conn@2||-3|6|||X|
NGround|gnd@0||-18|-1||||
NTransistor|nmos@0||-14|3|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NTransistor|nmos@1||-22|3|||XR||ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NTransistor|nmos@2||-27|8|||||ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NTransistor|nmos@3||-8|8|||||ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NWire_Pin|pin@0||-15|6||||
NWire_Pin|pin@1||-21|5||||
NWire_Pin|pin@2||-27|13||||
NWire_Pin|pin@3||-8|13||||
NTransistor|pmos@0||-14|8|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NTransistor|pmos@1||-22|8|||XR|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)S5
NPower|pwr@0||-18|10||||
Awire|net@0|||2700|nmos@1|d|-24|5|pmos@1|s|-24|6
Awire|net@2|||900|pmos@0|s|-12|6|nmos@0|d|-12|5
Awire|net@5|||2700|nmos@0|g|-15|3|pin@0||-15|6
Awire|net@6|||2700|pin@0||-15|6|pmos@0|g|-15|8
Awire|net@7|||1800|pmos@1|s|-24|6|pin@0||-15|6
Awire|net@8|||2700|nmos@1|g|-21|3|pin@1||-21|5
Awire|net@9|||2700|pin@1||-21|5|pmos@1|g|-21|8
Awire|net@10|||0|nmos@0|d|-12|5|pin@1||-21|5
Awire|net@11|||1800|nmos@2|d|-25|6|pmos@1|s|-24|6
Awire|net@12|||1800|pmos@0|s|-12|6|nmos@3|s|-10|6
Awire|net@13|||0|conn@0|y|-18|13|pin@2||-27|13
Awire|net@14|||900|pin@2||-27|13|nmos@2|g|-27|9
Awire|net@15|||1800|conn@0|y|-18|13|pin@3||-8|13
Awire|net@16|||900|pin@3||-8|13|nmos@3|g|-8|9
Awire|net@17|||0|nmos@2|s|-29|6|conn@1|y|-30|6
Awire|net@18|||0|conn@2|y|-5|6|nmos@3|d|-6|6
Awire|net@19|||1800|pwr@0||-18|10|pmos@0|d|-12|10
Awire|net@20|||0|pwr@0||-18|10|pmos@1|d|-24|10
Awire|net@21|||1800|nmos@1|s|-24|1|gnd@0||-18|1
Awire|net@22|||0|nmos@0|s|-12|1|gnd@0||-18|1
EBF||D5G2;|conn@2|y|B
EBT||D5G2;|conn@1|y|B
EWL||D5G2;|conn@0|y|I
X
# Cell cell2;1{lay}
Ccell2;1{lay}||mocmos|1615790313696|1615794522127||DRC_last_good_drc_area_date()G1615794499396|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1615794499396
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-P-Active-Con|contact@0||-64|6||||
NMetal-1-N-Active-Con|contact@1||-64|-11||||
NMetal-1-P-Active-Con|contact@4||-54|6||||
NMetal-1-N-Active-Con|contact@5||-54|-11||||
NMetal-1-N-Active-Con|contact@6||-74|-11||||
NMetal-1-P-Active-Con|contact@7||-74|6||||
NMetal-1-Polysilicon-1-Con|contact@8||-69|-1||||
NMetal-1-Polysilicon-1-Con|contact@9||-59|-4||||
NMetal-1-Metal-2-Con|contact@10||-64|10||||
NMetal-1-Metal-2-Con|contact@11||-64|-18||||
NMetal-1-Metal-2-Con|contact@12||-69|-1||||
NMetal-1-Metal-2-Con|contact@13||-59|-4||||
NMetal-1-Metal-2-Con|contact@14||-76|-4||||
NMetal-1-Metal-2-Con|contact@15||-52|-1||||
NMetal-2-Metal-3-Con|contact@17||-69|0||||
NMetal-1-Metal-2-Con|contact@18||-69|-1||||
NMetal-2-Metal-3-Con|contact@19||-52|-1||||
NMetal-2-Metal-3-Con|contact@20||-59|-5||||
NMetal-2-Metal-3-Con|contact@21||-76|-4||||
NMetal-1-Metal-2-Con|contact@22||-76|-4||||
NMetal-1-Polysilicon-1-Con|contact@23||-45|-3||||
NMetal-1-Polysilicon-1-Con|contact@24||-83|-3||||
NMetal-1-N-Active-Con|contact@25||-83|-11||||
NMetal-1-N-Active-Con|contact@26||-45|-11||||
NMetal-3-Metal-4-Con|contact@28||-83|-3||||
NMetal-2-Metal-3-Con|contact@29||-83|-3||||
NMetal-1-Metal-2-Con|contact@30||-83|-3||||
NMetal-3-Metal-4-Con|contact@31||-45|-3||||
NMetal-2-Metal-3-Con|contact@32||-45|-3||||
NMetal-1-Metal-2-Con|contact@33||-45|-3||||
NMetal-1-Metal-2-Con|contact@34||-38|-11||||
NMetal-2-Metal-3-Con|contact@35||-38|-11||||
NMetal-1-Metal-2-Con|contact@38||-90|-11||||
NMetal-2-Metal-3-Con|contact@39||-90|-11||||
NMetal-1-Metal-2-Con|contact@40||-83|10||||
NN-Transistor|nmos@0||-69|-11|2||R|
NN-Transistor|nmos@1||-59|-11|2||R|
NN-Transistor|nmos@2||-49|-11|2||R|
NN-Transistor|nmos@3||-79|-11|2||R|
NMetal-2-Pin|pin@0||-88|10||||
NMetal-2-Pin|pin@1||-88|-18||||
NMetal-2-Pin|pin@2||-40|-18||||
NMetal-2-Pin|pin@3||-40|10||||
NMetal-1-Pin|pin@4||-52|-4||||
NMetal-1-Pin|pin@5||-52|6||||
NMetal-1-Pin|pin@6||-52|-11||||
NMetal-1-Pin|pin@8||-76|6||||
NMetal-1-Pin|pin@9||-76|-11||||
NMetal-3-Pin|pin@10||-69|2||||
NMetal-3-Pin|pin@11||-52|2||||
NMetal-3-Pin|pin@12||-59|-7||||
NMetal-3-Pin|pin@13||-76|-7||||
NPolysilicon-1-Pin|pin@14||-45|-6.5||||
NPolysilicon-1-Pin|pin@15||-83|-6.5||||
NMetal-4-Pin|pin@16||-90|-3||||
NMetal-4-Pin|pin@17||-38|-3||||
NMetal-1-Pin|pin@19||-88|-11||||
NMetal-3-Pin|pin@20||-38|10||||
NMetal-3-Pin|pin@21||-38|-18||||
NMetal-3-Pin|pin@24||-90|10||||
NMetal-3-Pin|pin@25||-90|-18||||
NMetal-4-Pin|pin@26||-90.5|-3||||
NN-Well-Node|plnode@0||-86|5|12|12||A
NP-Transistor|pmos@0||-69|6|2||RRR|
NP-Transistor|pmos@1||-59|6|2||RRR|
NMetal-1-N-Well-Con|well@0||-83|6||||
AP-Active|net@0|||S1800|pmos@0|diff-top|-65.25|6|contact@0||-64|6
AP-Active|net@1|||S1800|contact@0||-64|6|pmos@1|diff-bottom|-62.75|6
AN-Active|net@2|||S0|contact@1||-64|-11|nmos@0|diff-bottom|-65.25|-11
AN-Active|net@3|||S1800|contact@1||-64|-11|nmos@1|diff-top|-62.75|-11
AP-Active|net@10|||S0|contact@4||-54|6|pmos@1|diff-top|-55.25|6
AN-Active|net@11|||S0|contact@5||-54|-11|nmos@1|diff-bottom|-55.25|-11
AN-Active|net@12|||S1800|contact@6||-74|-11|nmos@0|diff-top|-72.75|-11
AP-Active|net@13|||S1800|contact@7||-74|6|pmos@0|diff-bottom|-72.75|6
AN-Active|net@14|||S1800|contact@5||-54|-11|nmos@2|diff-top|-52.75|-11
AN-Active|net@21|||S1800|nmos@3|diff-bottom|-75.25|-11|contact@6||-74|-11
APolysilicon-1|net@22|||S900|pmos@0|poly-right|-69|1.5|contact@8||-69|-1
APolysilicon-1|net@23|||S2700|nmos@0|poly-right|-69|-6.5|contact@8||-69|-1
APolysilicon-1|net@24|||S2700|nmos@1|poly-right|-59|-6.5|contact@9||-59|-4
APolysilicon-1|net@25|||S900|pmos@1|poly-right|-59|1.5|contact@9||-59|-4
AMetal-2|net@29|||S1800|contact@10||-64|10|pin@3||-40|10
AMetal-1|net@30|||S2700|contact@0||-64|6|contact@10||-64|9
AMetal-2|net@31|||S1800|pin@1||-88|-18|contact@11||-64|-18
AMetal-2|net@32|||S1800|contact@11||-64|-18|pin@2||-40|-18
AMetal-1|net@33|||S900|contact@1||-64|-11|contact@11||-64|-17
AMetal-1|net@35|||S0|pin@5||-52|6|contact@4||-54|6
AMetal-1|net@36|||S900|pin@4||-52|-4|pin@6||-52|-11
AMetal-1|net@37|||S0|pin@6||-52|-11|contact@5||-54|-11
AMetal-1|net@38|||S2700|contact@22||-76|-4|pin@8||-76|6
AMetal-1|net@39|||S1800|pin@8||-76|6|contact@7||-74|6
AMetal-1|net@40|||S900|contact@22||-76|-4|pin@9||-76|-11
AMetal-1|net@41|||S1800|pin@9||-76|-11|contact@6||-74|-11
AMetal-1|net@42||1|S1800|contact@12||-69|-1|contact@8||-69|-1
AMetal-1|net@43||1|S1800|contact@13||-59|-4|contact@9||-59|-4
AMetal-1|net@44|||S|contact@14||-76|-4|contact@22||-76|-4
AMetal-1|net@45|||S2700|pin@4||-52|-4|contact@15||-52|-1
AMetal-1|net@46|||S2700|contact@15||-52|-1|pin@5||-52|6
AMetal-2|net@47||1|S1800|contact@17||-69|0|contact@18||-69|0
AMetal-1|net@48|||S|contact@8||-69|-1|contact@18||-69|-1
AMetal-3|net@49|||S900|pin@10||-69|2|contact@17||-69|0
AMetal-2|net@50||1|S0|contact@19||-52|-1|contact@15||-52|-1
AMetal-3|net@51|||S1800|pin@10||-69|2|pin@11||-52|2
AMetal-3|net@52|||S900|pin@11||-52|2|contact@19||-52|-1
AMetal-2|net@53||1|S2700|contact@20||-59|-5|contact@13||-59|-4
AMetal-3|net@54|||S900|contact@20||-59|-5|pin@12||-59|-7
AMetal-3|net@55|||S0|pin@12||-59|-7|pin@13||-76|-7
AMetal-2|net@56|||S900|contact@21||-76|-4|contact@22||-76|-4
AMetal-3|net@57|||S2700|pin@13||-76|-7|contact@21||-76|-4
APolysilicon-1|net@58|||S1800|nmos@2|poly-right|-49|-6.5|pin@14||-45|-6.5
APolysilicon-1|net@59|||S2700|pin@14||-45|-6.5|contact@23||-45|-3
APolysilicon-1|net@60|||S0|nmos@3|poly-right|-79|-6.5|pin@15||-83|-6.5
APolysilicon-1|net@61|||S2700|pin@15||-83|-6.5|contact@24||-83|-3
AN-Active|net@62|||S1800|contact@25||-83|-11|nmos@3|diff-top|-82.75|-11
AN-Active|net@63|||S0|contact@26||-45|-11|nmos@2|diff-bottom|-45.25|-11
AMetal-4|net@66|||S1800|pin@16||-90|-3|contact@28||-83|-3
AMetal-3|net@68|||S1800|contact@28||-83|-3|contact@29||-83|-3
AMetal-2|net@69|||S1800|contact@29||-83|-3|contact@30||-83|-3
AMetal-1|net@70|||S|contact@24||-83|-3|contact@30||-83|-3
AMetal-4|net@71|||S1800|contact@28||-83|-3|contact@31||-45|-3
AMetal-4|net@72|||S1800|contact@31||-45|-3|pin@17||-38|-3
AMetal-3|net@73|||S1800|contact@31||-45|-3|contact@32||-45|-3
AMetal-2|net@74|||S1800|contact@32||-45|-3|contact@33||-45|-3
AMetal-1|net@75|||S|contact@23||-45|-3|contact@33||-45|-3
AMetal-1|net@77||1|S0|contact@25||-83|-11|pin@19||-88|-11
AMetal-3|net@79|||S900|pin@20||-38|10|contact@35||-38|-11
AMetal-3|net@80|||S900|contact@35||-38|-11|pin@21||-38|-18
AMetal-2|net@81|||S|contact@34||-38|-11|contact@35||-38|-11
AMetal-1|net@82||1|S1800|contact@26||-45|-11|contact@34||-38|-11
AMetal-3|net@89|||S900|pin@24||-90|10|contact@39||-90|-11
AMetal-3|net@90|||S900|contact@39||-90|-11|pin@25||-90|-18
AMetal-2|net@91|||S1800|contact@38||-90|-11|contact@39||-90|-11
AMetal-1|net@92||1|S0|pin@19||-88|-11|contact@38||-90|-11
AMetal-2|net@93|||S1800|pin@0||-88|10|contact@40||-83|10
AMetal-2|net@94|||S1800|contact@40||-83|10|contact@10||-64|10
AMetal-1|net@95||1|S2700|well@0||-83|6|contact@40||-83|10
AMetal-4|net@96|||S1800|pin@26||-90.5|-3|pin@16||-90|-3
EBF||D5G2;|pin@21||B
EBT||D5G2;|pin@25||B
EWL||D5G2;|pin@26||I
Egnd||D5G2;|contact@11||G
Evdd||D5G2;|contact@10||P
X
# Cell cell2;1{sch}
Ccell2;1{sch}||schematic|1615790331738|1615794478804|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-16|37|||RRR|
NOff-Page|conn@1||-30|28||||
NOff-Page|conn@2||-1|28|||X|
NGround|gnd@0||-16|21||||
NTransistor|nmos@0||-12|25|||R||ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NTransistor|nmos@1||-20|25|||XR||ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NTransistor|nmos@2||-25|30|||||ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NTransistor|nmos@3||-6|30|||||ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NWire_Pin|pin@0||-13|28||||
NWire_Pin|pin@1||-19|27||||
NWire_Pin|pin@2||-25|35||||
NWire_Pin|pin@3||-6|35||||
NTransistor|pmos@0||-12|30|||R|2|ATTR_length(D5G0.5;X-0.5;Y-1;)S2|ATTR_width(D5G1;X0.5;Y-1;)S5
NTransistor|pmos@1||-20|30|||XR|2|ATTR_length(D5G0.5;X-0.5;Y-1;)D2.0|ATTR_width(D5G1;X0.5;Y-1;)S5
NPower|pwr@0||-16|32||||
Awire|net@0|||2700|nmos@1|d|-22|27|pmos@1|s|-22|28
Awire|net@1|||0|nmos@0|d|-10|27|pin@1||-19|27
Awire|net@2|||1800|pwr@0||-16|32|pmos@0|d|-10|32
Awire|net@3|||900|pmos@0|s|-10|28|nmos@0|d|-10|27
Awire|net@4|||0|pwr@0||-16|32|pmos@1|d|-22|32
Awire|net@5|||1800|nmos@1|s|-22|23|gnd@0||-16|23
Awire|net@6|||0|nmos@0|s|-10|23|gnd@0||-16|23
Awire|net@7|||2700|nmos@0|g|-13|25|pin@0||-13|28
Awire|net@8|||2700|pin@0||-13|28|pmos@0|g|-13|30
Awire|net@9|||1800|pmos@1|s|-22|28|pin@0||-13|28
Awire|net@10|||2700|nmos@1|g|-19|25|pin@1||-19|27
Awire|net@11|||2700|pin@1||-19|27|pmos@1|g|-19|30
Awire|net@12|||1800|nmos@2|d|-23|28|pmos@1|s|-22|28
Awire|net@13|||1800|pmos@0|s|-10|28|nmos@3|s|-8|28
Awire|net@14|||0|conn@0|y|-16|35|pin@2||-25|35
Awire|net@15|||900|pin@2||-25|35|nmos@2|g|-25|31
Awire|net@16|||1800|conn@0|y|-16|35|pin@3||-6|35
Awire|net@17|||900|pin@3||-6|35|nmos@3|g|-6|31
Awire|net@18|||0|nmos@2|s|-27|28|conn@1|y|-28|28
Awire|net@19|||0|conn@2|y|-3|28|nmos@3|d|-4|28
EBF||D5G2;|conn@2|a|B
EBT||D5G2;|conn@1|a|B
EWL||D5G2;|conn@0|y|I
X
# Cell ram;1{lay}
Cram;1{lay}||mocmos|1615794583172|1615795171069||DRC_last_good_drc_area_date()G1615795172930|DRC_last_good_drc_bit()I18|DRC_last_good_drc_date()G1615795172930
Ngeneric:Facet-Center|art@0||0|0||||AV
NMetal-1-P-Active-Con|contact@0||-4.5|15||||
NMetal-1-N-Active-Con|contact@1||-4.5|-2||||
NMetal-1-P-Active-Con|contact@2||5.5|15||||
NMetal-1-N-Active-Con|contact@3||5.5|-2||||
NMetal-1-N-Active-Con|contact@4||-14.5|-2||||
NMetal-1-P-Active-Con|contact@5||-14.5|15||||
NMetal-1-Polysilicon-1-Con|contact@6||-9.5|8||||
NMetal-1-Polysilicon-1-Con|contact@7||0.5|5||||
NMetal-1-Metal-2-Con|contact@9||-4.5|-9||||
NMetal-1-Metal-2-Con|contact@10||-9.5|8||||
NMetal-1-Metal-2-Con|contact@11||0.5|5||||
NMetal-1-Metal-2-Con|contact@12||-16.5|5||||
NMetal-1-Metal-2-Con|contact@13||7.5|8||||
NMetal-2-Metal-3-Con|contact@14||-9.5|9||||
NMetal-1-Metal-2-Con|contact@15||-9.5|8||||
NMetal-2-Metal-3-Con|contact@16||7.5|8||||
NMetal-2-Metal-3-Con|contact@17||0.5|4||||
NMetal-2-Metal-3-Con|contact@18||-16.5|5||||
NMetal-1-Metal-2-Con|contact@19||-16.5|5||||
NMetal-1-Polysilicon-1-Con|contact@20||14.5|6||||
NMetal-1-Polysilicon-1-Con|contact@21||-23.5|6||||
NMetal-1-N-Active-Con|contact@22||-23.5|-2||||
NMetal-1-N-Active-Con|contact@23||14.5|-2||||
NMetal-3-Metal-4-Con|contact@24||-23.5|6||||
NMetal-2-Metal-3-Con|contact@25||-23.5|6||||
NMetal-1-Metal-2-Con|contact@26||-23.5|6||||
NMetal-3-Metal-4-Con|contact@27||14.5|6||||
NMetal-2-Metal-3-Con|contact@28||14.5|6||||
NMetal-1-Metal-2-Con|contact@29||14.5|6||||
NMetal-1-Metal-2-Con|contact@30||21.5|-2||||
NMetal-2-Metal-3-Con|contact@31||21.5|-2||||
NMetal-1-Metal-2-Con|contact@32||-30.5|-2||||
NMetal-2-Metal-3-Con|contact@33||-30.5|-2||||
NMetal-1-P-Active-Con|contact@35||-4.5|27|||Y|
NMetal-1-N-Active-Con|contact@36||-4.5|44|||Y|
NMetal-1-P-Active-Con|contact@37||5.5|27|||Y|
NMetal-1-N-Active-Con|contact@38||5.5|44|||Y|
NMetal-1-N-Active-Con|contact@39||-14.5|44|||Y|
NMetal-1-P-Active-Con|contact@40||-14.5|27|||Y|
NMetal-1-Polysilicon-1-Con|contact@41||-9.5|34|||Y|
NMetal-1-Polysilicon-1-Con|contact@42||0.5|37|||Y|
NMetal-1-Metal-2-Con|contact@44||-4.5|51|||Y|
NMetal-1-Metal-2-Con|contact@45||-9.5|34|||Y|
NMetal-1-Metal-2-Con|contact@46||0.5|37|||Y|
NMetal-1-Metal-2-Con|contact@47||-16.5|37|||Y|
NMetal-1-Metal-2-Con|contact@48||7.5|34|||Y|
NMetal-2-Metal-3-Con|contact@49||-9.5|33|||Y|
NMetal-1-Metal-2-Con|contact@50||-9.5|34|||Y|
NMetal-2-Metal-3-Con|contact@51||7.5|34|||Y|
NMetal-2-Metal-3-Con|contact@52||0.5|38|||Y|
NMetal-2-Metal-3-Con|contact@53||-16.5|37|||Y|
NMetal-1-Metal-2-Con|contact@54||-16.5|37|||Y|
NMetal-1-Polysilicon-1-Con|contact@55||14.5|36|||Y|
NMetal-1-Polysilicon-1-Con|contact@56||-23.5|36|||Y|
NMetal-1-N-Active-Con|contact@57||-23.5|44|||Y|
NMetal-1-N-Active-Con|contact@58||14.5|44|||Y|
NMetal-3-Metal-4-Con|contact@59||-23.5|36|||Y|
NMetal-2-Metal-3-Con|contact@60||-23.5|36|||Y|
NMetal-1-Metal-2-Con|contact@61||-23.5|36|||Y|
NMetal-3-Metal-4-Con|contact@62||14.5|36|||Y|
NMetal-2-Metal-3-Con|contact@63||14.5|36|||Y|
NMetal-1-Metal-2-Con|contact@64||14.5|36|||Y|
NMetal-1-Metal-2-Con|contact@65||21.5|44|||Y|
NMetal-2-Metal-3-Con|contact@66||21.5|44|||Y|
NMetal-1-Metal-2-Con|contact@67||-30.5|44|||Y|
NMetal-2-Metal-3-Con|contact@68||-30.5|44|||Y|
NMetal-1-Metal-2-Con|contact@71||-4.5|21||||
NMetal-1-P-Active-Con|contact@72||-4.5|-33.5|||Y|
NMetal-1-N-Active-Con|contact@73||-4.5|-16.5|||Y|
NMetal-1-P-Active-Con|contact@74||5.5|-33.5|||Y|
NMetal-1-N-Active-Con|contact@75||5.5|-16.5|||Y|
NMetal-1-N-Active-Con|contact@76||-14.5|-16.5|||Y|
NMetal-1-P-Active-Con|contact@77||-14.5|-33.5|||Y|
NMetal-1-Polysilicon-1-Con|contact@78||-9.5|-26.5|||Y|
NMetal-1-Polysilicon-1-Con|contact@79||0.5|-23.5|||Y|
NMetal-1-Metal-2-Con|contact@80||-4.5|-37.5|||Y|
NMetal-1-Metal-2-Con|contact@82||-9.5|-26.5|||Y|
NMetal-1-Metal-2-Con|contact@83||0.5|-23.5|||Y|
NMetal-1-Metal-2-Con|contact@84||-16.5|-23.5|||Y|
NMetal-1-Metal-2-Con|contact@85||7.5|-26.5|||Y|
NMetal-2-Metal-3-Con|contact@86||-9.5|-27.5|||Y|
NMetal-1-Metal-2-Con|contact@87||-9.5|-26.5|||Y|
NMetal-2-Metal-3-Con|contact@88||7.5|-26.5|||Y|
NMetal-2-Metal-3-Con|contact@89||0.5|-22.5|||Y|
NMetal-2-Metal-3-Con|contact@90||-16.5|-23.5|||Y|
NMetal-1-Metal-2-Con|contact@91||-16.5|-23.5|||Y|
NMetal-1-Polysilicon-1-Con|contact@92||14.5|-24.5|||Y|
NMetal-1-Polysilicon-1-Con|contact@93||-23.5|-24.5|||Y|
NMetal-1-N-Active-Con|contact@94||-23.5|-16.5|||Y|
NMetal-1-N-Active-Con|contact@95||14.5|-16.5|||Y|
NMetal-3-Metal-4-Con|contact@96||-23.5|-24.5|||Y|
NMetal-2-Metal-3-Con|contact@97||-23.5|-24.5|||Y|
NMetal-1-Metal-2-Con|contact@98||-23.5|-24.5|||Y|
NMetal-3-Metal-4-Con|contact@99||14.5|-24.5|||Y|
NMetal-2-Metal-3-Con|contact@100||14.5|-24.5|||Y|
NMetal-1-Metal-2-Con|contact@101||14.5|-24.5|||Y|
NMetal-1-Metal-2-Con|contact@102||21.5|-16.5|||Y|
NMetal-2-Metal-3-Con|contact@103||21.5|-16.5|||Y|
NMetal-1-Metal-2-Con|contact@104||-30.5|-16.5|||Y|
NMetal-2-Metal-3-Con|contact@105||-30.5|-16.5|||Y|
NMetal-1-Metal-2-Con|contact@106||-23.5|-37.5|||Y|
NMetal-1-N-Active-Con|contact@107||-4.5|-16.5||||
NMetal-1-P-Active-Con|contact@108||-4.5|75||||
NMetal-1-N-Active-Con|contact@109||-4.5|58||||
NMetal-1-P-Active-Con|contact@110||5.5|75||||
NMetal-1-N-Active-Con|contact@111||5.5|58||||
NMetal-1-N-Active-Con|contact@112||-14.5|58||||
NMetal-1-P-Active-Con|contact@113||-14.5|75||||
NMetal-1-Polysilicon-1-Con|contact@114||-9.5|68||||
NMetal-1-Polysilicon-1-Con|contact@115||0.5|65||||
NMetal-1-Metal-2-Con|contact@116||-4.5|79||||
NMetal-1-Metal-2-Con|contact@118||-9.5|68||||
NMetal-1-Metal-2-Con|contact@119||0.5|65||||
NMetal-1-Metal-2-Con|contact@120||-16.5|65||||
NMetal-1-Metal-2-Con|contact@121||7.5|68||||
NMetal-2-Metal-3-Con|contact@122||-9.5|69||||
NMetal-1-Metal-2-Con|contact@123||-9.5|68||||
NMetal-2-Metal-3-Con|contact@124||7.5|68||||
NMetal-2-Metal-3-Con|contact@125||0.5|64||||
NMetal-2-Metal-3-Con|contact@126||-16.5|65||||
NMetal-1-Metal-2-Con|contact@127||-16.5|65||||
NMetal-1-Polysilicon-1-Con|contact@128||14.5|66||||
NMetal-1-Polysilicon-1-Con|contact@129||-23.5|66||||
NMetal-1-N-Active-Con|contact@130||-23.5|58||||
NMetal-1-N-Active-Con|contact@131||14.5|58||||
NMetal-3-Metal-4-Con|contact@132||-23.5|66||||
NMetal-2-Metal-3-Con|contact@133||-23.5|66||||
NMetal-1-Metal-2-Con|contact@134||-23.5|66||||
NMetal-3-Metal-4-Con|contact@135||14.5|66||||
NMetal-2-Metal-3-Con|contact@136||14.5|66||||
NMetal-1-Metal-2-Con|contact@137||14.5|66||||
NMetal-1-Metal-2-Con|contact@138||21.5|58||||
NMetal-2-Metal-3-Con|contact@139||21.5|58||||
NMetal-1-Metal-2-Con|contact@140||-30.5|58||||
NMetal-2-Metal-3-Con|contact@141||-30.5|58||||
NMetal-1-Metal-2-Con|contact@142||-23.5|79||||
NN-Transistor|nmos@0||-9.5|-2|2||R|
NN-Transistor|nmos@1||0.5|-2|2||R|
NN-Transistor|nmos@2||10.5|-2|2||R|
NN-Transistor|nmos@3||-19.5|-2|2||R|
NN-Transistor|nmos@4||-9.5|44|2||YR|
NN-Transistor|nmos@5||0.5|44|2||YR|
NN-Transistor|nmos@6||10.5|44|2||YR|
NN-Transistor|nmos@7||-19.5|44|2||YR|
NN-Transistor|nmos@8||-9.5|-16.5|2||YR|
NN-Transistor|nmos@9||0.5|-16.5|2||YR|
NN-Transistor|nmos@10||10.5|-16.5|2||YR|
NN-Transistor|nmos@11||-19.5|-16.5|2||YR|
NN-Transistor|nmos@12||-9.5|58|2||R|
NN-Transistor|nmos@13||0.5|58|2||R|
NN-Transistor|nmos@14||10.5|58|2||R|
NN-Transistor|nmos@15||-19.5|58|2||R|
NMetal-2-Pin|pin@1||-28.5|-9||||
NMetal-2-Pin|pin@2||19.5|-9||||
NMetal-1-Pin|pin@4||7.5|5||||
NMetal-1-Pin|pin@5||7.5|15||||
NMetal-1-Pin|pin@6||7.5|-2||||
NMetal-1-Pin|pin@7||-16.5|15||||
NMetal-1-Pin|pin@8||-16.5|-2||||
NMetal-3-Pin|pin@9||-9.5|11||||
NMetal-3-Pin|pin@10||7.5|11||||
NMetal-3-Pin|pin@11||0.5|2||||
NMetal-3-Pin|pin@12||-16.5|2||||
NPolysilicon-1-Pin|pin@13||14.5|2.5||||
NPolysilicon-1-Pin|pin@14||-23.5|2.5||||
NMetal-4-Pin|pin@15||-30.5|6||||
NMetal-4-Pin|pin@16||21.5|6||||
NMetal-1-Pin|pin@17||-28.5|-2||||
NMetal-3-Pin|pin@18||21.5|19||||
NMetal-3-Pin|pin@19||21.5|-4.5||||
NMetal-3-Pin|pin@20||-30.5|19||||
NMetal-3-Pin|pin@21||-30.5|-4.5||||
NMetal-4-Pin|pin@22||-31|6||||
NMetal-2-Pin|pin@24||-28.5|51|||Y|
NMetal-2-Pin|pin@25||19.5|51|||Y|
NMetal-1-Pin|pin@27||7.5|37|||Y|
NMetal-1-Pin|pin@28||7.5|27|||Y|
NMetal-1-Pin|pin@29||7.5|44|||Y|
NMetal-1-Pin|pin@30||-16.5|27|||Y|
NMetal-1-Pin|pin@31||-16.5|44|||Y|
NMetal-3-Pin|pin@32||-9.5|31|||Y|
NMetal-3-Pin|pin@33||7.5|31|||Y|
NMetal-3-Pin|pin@34||0.5|40|||Y|
NMetal-3-Pin|pin@35||-16.5|40|||Y|
NPolysilicon-1-Pin|pin@36||14.5|39.5|||Y|
NPolysilicon-1-Pin|pin@37||-23.5|39.5|||Y|
NMetal-4-Pin|pin@38||-30.5|36|||Y|
NMetal-4-Pin|pin@39||21.5|36|||Y|
NMetal-1-Pin|pin@40||-28.5|44|||Y|
NMetal-3-Pin|pin@41||21.5|23|||Y|
NMetal-3-Pin|pin@42||21.5|46.5|||Y|
NMetal-3-Pin|pin@43||-30.5|23|||Y|
NMetal-3-Pin|pin@44||-30.5|46.5|||Y|
NMetal-4-Pin|pin@45||-31|36|||Y|
NMetal-2-Pin|pin@46||-30.5|21||||
NMetal-2-Pin|pin@47||21.5|21||||
NMetal-2-Pin|pin@48||-28.5|-37.5|||Y|
NMetal-2-Pin|pin@51||19.5|-37.5|||Y|
NMetal-1-Pin|pin@52||7.5|-23.5|||Y|
NMetal-1-Pin|pin@53||7.5|-33.5|||Y|
NMetal-1-Pin|pin@54||7.5|-16.5|||Y|
NMetal-1-Pin|pin@55||-16.5|-33.5|||Y|
NMetal-1-Pin|pin@56||-16.5|-16.5|||Y|
NMetal-3-Pin|pin@57||-9.5|-29.5|||Y|
NMetal-3-Pin|pin@58||7.5|-29.5|||Y|
NMetal-3-Pin|pin@59||0.5|-20.5|||Y|
NMetal-3-Pin|pin@60||-16.5|-20.5|||Y|
NPolysilicon-1-Pin|pin@61||14.5|-21|||Y|
NPolysilicon-1-Pin|pin@62||-23.5|-21|||Y|
NMetal-4-Pin|pin@63||-30.5|-24.5|||Y|
NMetal-4-Pin|pin@64||21.5|-24.5|||Y|
NMetal-1-Pin|pin@65||-28.5|-16.5|||Y|
NMetal-3-Pin|pin@66||21.5|-37.5|||Y|
NMetal-3-Pin|pin@67||21.5|-9.5|||Y|
NMetal-3-Pin|pin@68||-30.5|-37.5|||Y|
NMetal-3-Pin|pin@69||-30.5|-9.5|||Y|
NMetal-4-Pin|pin@70||-31|-24.5|||Y|
NMetal-2-Pin|pin@71||-28.5|79||||
NMetal-2-Pin|pin@74||19.5|79||||
NMetal-1-Pin|pin@75||7.5|65||||
NMetal-1-Pin|pin@76||7.5|75||||
NMetal-1-Pin|pin@77||7.5|58||||
NMetal-1-Pin|pin@78||-16.5|75||||
NMetal-1-Pin|pin@79||-16.5|58||||
NMetal-3-Pin|pin@80||-9.5|71||||
NMetal-3-Pin|pin@81||7.5|71||||
NMetal-3-Pin|pin@82||0.5|62||||
NMetal-3-Pin|pin@83||-16.5|62||||
NPolysilicon-1-Pin|pin@84||14.5|62.5||||
NPolysilicon-1-Pin|pin@85||-23.5|62.5||||
NMetal-4-Pin|pin@86||-30.5|66||||
NMetal-4-Pin|pin@87||21.5|66||||
NMetal-1-Pin|pin@88||-28.5|58||||
NMetal-3-Pin|pin@89||21.5|79||||
NMetal-3-Pin|pin@90||21.5|51||||
NMetal-3-Pin|pin@91||-30.5|79||||
NMetal-3-Pin|pin@92||-30.5|51||||
NMetal-4-Pin|pin@93||-31|66||||
NN-Well-Node|plnode@0||-26.5|13|12|12||A
NN-Well-Node|plnode@1||-26.5|-37|12|12|Y|A
NN-Well-Node|plnode@2||-26.5|78.5|12|12||A
NP-Transistor|pmos@0||-9.5|15|2||RRR|
NP-Transistor|pmos@1||0.5|15|2||RRR|
NP-Transistor|pmos@2||-9.5|27|2||YRRR|
NP-Transistor|pmos@3||0.5|27|2||YRRR|
NP-Transistor|pmos@4||-9.5|-33.5|2||YRRR|
NP-Transistor|pmos@5||0.5|-33.5|2||YRRR|
NP-Transistor|pmos@6||-9.5|75|2||RRR|
NP-Transistor|pmos@7||0.5|75|2||RRR|
NMetal-1-N-Well-Con|well@0||-23.5|15||||
NMetal-1-N-Well-Con|well@1||-23.5|-33.5|||Y|
NMetal-1-N-Well-Con|well@2||-23.5|75||||
AP-Active|net@0|||S1800|pmos@0|diff-top|-5.75|15|contact@0||-4.5|15
AP-Active|net@1|||S1800|contact@0||-4.5|15|pmos@1|diff-bottom|-3.25|15
APolysilicon-1|net@2|||S2700|nmos@0|poly-right|-9.5|2.5|contact@6||-9.5|8
APolysilicon-1|net@3|||S2700|nmos@1|poly-right|0.5|2.5|contact@7||0.5|5
APolysilicon-1|net@4|||S900|pmos@1|poly-right|0.5|10.5|contact@7||0.5|5
AN-Active|net@6|||S1800|contact@1||-4.5|-2|nmos@1|diff-top|-3.25|-2
AMetal-2|net@8|||S1800|pin@1||-28.5|-9|contact@9||-4.5|-9
AMetal-2|net@9|||S1800|contact@9||-4.5|-9|pin@2||19.5|-9
AMetal-1|net@10|||S900|contact@1||-4.5|-2|contact@9||-4.5|-8
AMetal-1|net@11|||S0|pin@5||7.5|15|contact@2||5.5|15
AP-Active|net@12|||S0|contact@2||5.5|15|pmos@1|diff-top|4.25|15
AMetal-1|net@13|||S900|pin@4||7.5|5|pin@6||7.5|-2
AMetal-1|net@14|||S0|pin@6||7.5|-2|contact@3||5.5|-2
AMetal-1|net@15|||S2700|contact@19||-16.5|5|pin@7||-16.5|15
AMetal-1|net@16|||S1800|pin@7||-16.5|15|contact@5||-14.5|15
AMetal-1|net@17|||S900|contact@19||-16.5|5|pin@8||-16.5|-2
AMetal-1|net@18|||S1800|pin@8||-16.5|-2|contact@4||-14.5|-2
AMetal-1|net@19||1|S1800|contact@10||-9.5|8|contact@6||-9.5|8
AMetal-1|net@20||1|S1800|contact@11||0.5|5|contact@7||0.5|5
AMetal-1|net@21|||S|contact@12||-16.5|5|contact@19||-16.5|5
AMetal-1|net@22|||S2700|pin@4||7.5|5|contact@13||7.5|8
AN-Active|net@23|||S0|contact@3||5.5|-2|nmos@1|diff-bottom|4.25|-2
AMetal-1|net@24|||S2700|contact@13||7.5|8|pin@5||7.5|15
AMetal-2|net@25||1|S1800|contact@14||-9.5|9|contact@15||-9.5|9
AMetal-1|net@26|||S|contact@6||-9.5|8|contact@15||-9.5|8
AMetal-3|net@27|||S900|pin@9||-9.5|11|contact@14||-9.5|9
AMetal-2|net@28||1|S0|contact@16||7.5|8|contact@13||7.5|8
AMetal-3|net@29|||S1800|pin@9||-9.5|11|pin@10||7.5|11
AMetal-3|net@30|||S900|pin@10||7.5|11|contact@16||7.5|8
AMetal-2|net@31||1|S2700|contact@17||0.5|4|contact@11||0.5|5
AMetal-3|net@32|||S900|contact@17||0.5|4|pin@11||0.5|2
AMetal-3|net@33|||S0|pin@11||0.5|2|pin@12||-16.5|2
AN-Active|net@34|||S1800|contact@4||-14.5|-2|nmos@0|diff-top|-13.25|-2
AMetal-2|net@35|||S900|contact@18||-16.5|5|contact@19||-16.5|5
AMetal-3|net@36|||S2700|pin@12||-16.5|2|contact@18||-16.5|5
APolysilicon-1|net@37|||S1800|nmos@2|poly-right|10.5|2.5|pin@13||14.5|2.5
APolysilicon-1|net@38|||S2700|pin@13||14.5|2.5|contact@20||14.5|6
APolysilicon-1|net@39|||S0|nmos@3|poly-right|-19.5|2.5|pin@14||-23.5|2.5
APolysilicon-1|net@40|||S2700|pin@14||-23.5|2.5|contact@21||-23.5|6
AN-Active|net@41|||S1800|contact@22||-23.5|-2|nmos@3|diff-top|-23.25|-2
AN-Active|net@42|||S0|contact@23||14.5|-2|nmos@2|diff-bottom|14.25|-2
AMetal-4|net@43|||S1800|pin@15||-30.5|6|contact@24||-23.5|6
AMetal-3|net@44|||S1800|contact@24||-23.5|6|contact@25||-23.5|6
AP-Active|net@45|||S1800|contact@5||-14.5|15|pmos@0|diff-bottom|-13.25|15
AMetal-2|net@46|||S1800|contact@25||-23.5|6|contact@26||-23.5|6
AMetal-1|net@47|||S|contact@21||-23.5|6|contact@26||-23.5|6
AMetal-4|net@48|||S1800|contact@24||-23.5|6|contact@27||14.5|6
AMetal-4|net@49|||S1800|contact@27||14.5|6|pin@16||21.5|6
AMetal-3|net@50|||S1800|contact@27||14.5|6|contact@28||14.5|6
AMetal-2|net@51|||S1800|contact@28||14.5|6|contact@29||14.5|6
AMetal-1|net@52|||S|contact@20||14.5|6|contact@29||14.5|6
AMetal-1|net@53||1|S0|contact@22||-23.5|-2|pin@17||-28.5|-2
AMetal-3|net@54|||S900|pin@18||21.5|19|contact@31||21.5|-2
AMetal-3|net@55|||S900|contact@31||21.5|-2|pin@19||21.5|-4.5
AN-Active|net@56|||S1800|contact@3||5.5|-2|nmos@2|diff-top|6.75|-2
AMetal-2|net@57|||S|contact@30||21.5|-2|contact@31||21.5|-2
AMetal-1|net@58||1|S1800|contact@23||14.5|-2|contact@30||21.5|-2
AMetal-3|net@59|||S900|pin@20||-30.5|19|contact@33||-30.5|-2
AMetal-3|net@60|||S900|contact@33||-30.5|-2|pin@21||-30.5|-4.5
AMetal-2|net@61|||S1800|contact@32||-30.5|-2|contact@33||-30.5|-2
AMetal-1|net@62||1|S0|pin@17||-28.5|-2|contact@32||-30.5|-2
AMetal-4|net@66|||S1800|pin@22||-31|6|pin@15||-30.5|6
AN-Active|net@67|||S0|contact@1||-4.5|-2|nmos@0|diff-bottom|-5.75|-2
AN-Active|net@68|||S1800|nmos@3|diff-bottom|-15.75|-2|contact@4||-14.5|-2
APolysilicon-1|net@69|||S900|pmos@0|poly-right|-9.5|10.5|contact@6||-9.5|8
AP-Active|net@70|||S1800|pmos@2|diff-top|-5.75|27|contact@35||-4.5|27
AP-Active|net@71|||S1800|contact@35||-4.5|27|pmos@3|diff-bottom|-3.25|27
AMetal-1|net@72|||S2700|contact@36||-4.5|44|contact@44||-4.5|50
AMetal-1|net@73|||S0|pin@28||7.5|27|contact@37||5.5|27
AP-Active|net@74|||S0|contact@37||5.5|27|pmos@3|diff-top|4.25|27
AMetal-1|net@75|||S2700|pin@27||7.5|37|pin@29||7.5|44
AMetal-1|net@76|||S0|pin@29||7.5|44|contact@38||5.5|44
AMetal-1|net@77|||S900|contact@54||-16.5|37|pin@30||-16.5|27
AMetal-1|net@78|||S1800|pin@30||-16.5|27|contact@40||-14.5|27
AMetal-1|net@79|||S2700|contact@54||-16.5|37|pin@31||-16.5|44
AMetal-1|net@80|||S1800|pin@31||-16.5|44|contact@39||-14.5|44
AMetal-1|net@81||1|S1800|contact@45||-9.5|34|contact@41||-9.5|34
APolysilicon-1|net@82|||S900|nmos@4|poly-right|-9.5|39.5|contact@41||-9.5|34
AMetal-1|net@83||1|S1800|contact@46||0.5|37|contact@42||0.5|37
AMetal-1|net@84|||S|contact@47||-16.5|37|contact@54||-16.5|37
AMetal-1|net@85|||S900|pin@27||7.5|37|contact@48||7.5|34
AN-Active|net@86|||S0|contact@38||5.5|44|nmos@5|diff-bottom|4.25|44
AMetal-1|net@87|||S900|contact@48||7.5|34|pin@28||7.5|27
AMetal-2|net@88||1|S1800|contact@49||-9.5|33|contact@50||-9.5|33
AMetal-1|net@89|||S|contact@41||-9.5|34|contact@50||-9.5|34
AMetal-3|net@90|||S2700|pin@32||-9.5|31|contact@49||-9.5|33
AMetal-2|net@91||1|S0|contact@51||7.5|34|contact@48||7.5|34
AMetal-3|net@92|||S1800|pin@32||-9.5|31|pin@33||7.5|31
APolysilicon-1|net@93|||S900|nmos@5|poly-right|0.5|39.5|contact@42||0.5|37
AMetal-3|net@94|||S2700|pin@33||7.5|31|contact@51||7.5|34
AMetal-2|net@95||1|S900|contact@52||0.5|38|contact@46||0.5|37
AMetal-3|net@96|||S2700|contact@52||0.5|38|pin@34||0.5|40
AMetal-3|net@97|||S0|pin@34||0.5|40|pin@35||-16.5|40
AN-Active|net@98|||S1800|contact@39||-14.5|44|nmos@4|diff-top|-13.25|44
AMetal-2|net@99|||S900|contact@53||-16.5|37|contact@54||-16.5|37
AMetal-3|net@100|||S900|pin@35||-16.5|40|contact@53||-16.5|37
APolysilicon-1|net@101|||S1800|nmos@6|poly-right|10.5|39.5|pin@36||14.5|39.5
APolysilicon-1|net@102|||S900|pin@36||14.5|39.5|contact@55||14.5|36
APolysilicon-1|net@103|||S0|nmos@7|poly-right|-19.5|39.5|pin@37||-23.5|39.5
APolysilicon-1|net@104|||S2700|pmos@3|poly-right|0.5|31.5|contact@42||0.5|37
APolysilicon-1|net@105|||S900|pin@37||-23.5|39.5|contact@56||-23.5|36
AN-Active|net@106|||S1800|contact@57||-23.5|44|nmos@7|diff-top|-23.25|44
AN-Active|net@107|||S0|contact@58||14.5|44|nmos@6|diff-bottom|14.25|44
AMetal-4|net@108|||S1800|pin@38||-30.5|36|contact@59||-23.5|36
AMetal-3|net@109|||S1800|contact@59||-23.5|36|contact@60||-23.5|36
AP-Active|net@110|||S1800|contact@40||-14.5|27|pmos@2|diff-bottom|-13.25|27
AMetal-2|net@111|||S1800|contact@60||-23.5|36|contact@61||-23.5|36
AMetal-1|net@112|||S|contact@56||-23.5|36|contact@61||-23.5|36
AMetal-4|net@113|||S1800|contact@59||-23.5|36|contact@62||14.5|36
AMetal-4|net@114|||S1800|contact@62||14.5|36|pin@39||21.5|36
AMetal-3|net@116|||S1800|contact@62||14.5|36|contact@63||14.5|36
AMetal-2|net@117|||S1800|contact@63||14.5|36|contact@64||14.5|36
AMetal-1|net@118|||S|contact@55||14.5|36|contact@64||14.5|36
AMetal-1|net@119||1|S0|contact@57||-23.5|44|pin@40||-28.5|44
AMetal-3|net@120|||S2700|pin@41||21.5|23|contact@66||21.5|44
AMetal-3|net@121|||S2700|contact@66||21.5|44|pin@42||21.5|46.5
AN-Active|net@122|||S1800|contact@38||5.5|44|nmos@6|diff-top|6.75|44
AMetal-2|net@123|||S|contact@65||21.5|44|contact@66||21.5|44
AMetal-1|net@124||1|S1800|contact@58||14.5|44|contact@65||21.5|44
AMetal-3|net@125|||S2700|pin@43||-30.5|23|contact@68||-30.5|44
AN-Active|net@126|||S1800|contact@36||-4.5|44|nmos@5|diff-top|-3.25|44
AMetal-3|net@127|||S2700|contact@68||-30.5|44|pin@44||-30.5|46.5
AMetal-2|net@128|||S1800|contact@67||-30.5|44|contact@68||-30.5|44
AMetal-1|net@129||1|S0|pin@40||-28.5|44|contact@67||-30.5|44
AMetal-4|net@133|||S1800|pin@45||-31|36|pin@38||-30.5|36
AN-Active|net@134|||S0|contact@36||-4.5|44|nmos@4|diff-bottom|-5.75|44
AN-Active|net@135|||S1800|nmos@7|diff-bottom|-15.75|44|contact@39||-14.5|44
APolysilicon-1|net@136|||S2700|pmos@2|poly-right|-9.5|31.5|contact@41||-9.5|34
AMetal-2|net@138|||S1800|pin@24||-28.5|51|contact@44||-4.5|51
AMetal-2|net@139|||S1800|contact@44||-4.5|51|pin@25||19.5|51
AMetal-3|net@141|||S2700|pin@20||-30.5|19|pin@43||-30.5|23
AMetal-3|net@142|||S2700|pin@18||21.5|19|pin@41||21.5|23
AMetal-1|net@143||1|S2700|contact@71||-4.5|20.5|contact@35||-4.5|27
AMetal-1|net@144||1|S2700|contact@0||-4.5|15|contact@71||-4.5|21.5
AMetal-2|net@145|||S1800|pin@46||-30.5|21|pin@47||21.5|21
AMetal-2|net@146|||S0|pin@47||21.5|21|contact@71||-4.5|21
AMetal-1|net@147|||S900|contact@85||7.5|-26.5|pin@53||7.5|-33.5
AMetal-2|net@148||1|S1800|contact@86||-9.5|-27.5|contact@87||-9.5|-27.5
AMetal-1|net@149|||S|contact@78||-9.5|-26.5|contact@87||-9.5|-26.5
AMetal-3|net@150|||S2700|pin@57||-9.5|-29.5|contact@86||-9.5|-27.5
AMetal-2|net@151||1|S0|contact@88||7.5|-26.5|contact@85||7.5|-26.5
AMetal-3|net@152|||S1800|pin@57||-9.5|-29.5|pin@58||7.5|-29.5
AMetal-3|net@153|||S2700|pin@58||7.5|-29.5|contact@88||7.5|-26.5
AMetal-2|net@154||1|S900|contact@89||0.5|-22.5|contact@83||0.5|-23.5
AMetal-3|net@155|||S2700|contact@89||0.5|-22.5|pin@59||0.5|-20.5
AMetal-3|net@156|||S0|pin@59||0.5|-20.5|pin@60||-16.5|-20.5
AMetal-2|net@157|||S900|contact@90||-16.5|-23.5|contact@91||-16.5|-23.5
AMetal-3|net@158|||S900|pin@60||-16.5|-20.5|contact@90||-16.5|-23.5
APolysilicon-1|net@159|||S1800|nmos@10|poly-right|10.5|-21|pin@61||14.5|-21
APolysilicon-1|net@160|||S900|pin@61||14.5|-21|contact@92||14.5|-24.5
APolysilicon-1|net@161|||S0|nmos@11|poly-right|-19.5|-21|pin@62||-23.5|-21
APolysilicon-1|net@162|||S900|pin@62||-23.5|-21|contact@93||-23.5|-24.5
AN-Active|net@163|||S1800|contact@94||-23.5|-16.5|nmos@11|diff-top|-23.25|-16.5
AN-Active|net@164|||S0|contact@95||14.5|-16.5|nmos@10|diff-bottom|14.25|-16.5
AMetal-4|net@165|||S1800|pin@63||-30.5|-24.5|contact@96||-23.5|-24.5
AMetal-3|net@166|||S1800|contact@96||-23.5|-24.5|contact@97||-23.5|-24.5
AMetal-2|net@167|||S1800|contact@97||-23.5|-24.5|contact@98||-23.5|-24.5
AMetal-1|net@168|||S|contact@93||-23.5|-24.5|contact@98||-23.5|-24.5
AMetal-4|net@169|||S1800|contact@96||-23.5|-24.5|contact@99||14.5|-24.5
AMetal-4|net@170|||S1800|contact@99||14.5|-24.5|pin@64||21.5|-24.5
AMetal-3|net@171|||S1800|contact@99||14.5|-24.5|contact@100||14.5|-24.5
AMetal-2|net@172|||S1800|contact@100||14.5|-24.5|contact@101||14.5|-24.5
AMetal-1|net@173|||S|contact@92||14.5|-24.5|contact@101||14.5|-24.5
AMetal-1|net@174||1|S0|contact@94||-23.5|-16.5|pin@65||-28.5|-16.5
AMetal-3|net@175|||S2700|pin@66||21.5|-37.5|contact@103||21.5|-16.5
AMetal-3|net@176|||S2700|contact@103||21.5|-16.5|pin@67||21.5|-9.5
AMetal-2|net@177|||S|contact@102||21.5|-16.5|contact@103||21.5|-16.5
AMetal-1|net@178||1|S1800|contact@95||14.5|-16.5|contact@102||21.5|-16.5
AMetal-3|net@179|||S2700|pin@68||-30.5|-37.5|contact@105||-30.5|-16.5
AMetal-3|net@180|||S2700|contact@105||-30.5|-16.5|pin@69||-30.5|-9.5
AMetal-2|net@181|||S1800|contact@104||-30.5|-16.5|contact@105||-30.5|-16.5
AMetal-1|net@182||1|S0|pin@65||-28.5|-16.5|contact@104||-30.5|-16.5
AMetal-2|net@183|||S1800|pin@48||-28.5|-37.5|contact@106||-23.5|-37.5
AMetal-2|net@184|||S1800|contact@106||-23.5|-37.5|contact@80||-4.5|-37.5
AMetal-1|net@185||1|S900|well@1||-23.5|-33.5|contact@106||-23.5|-37.5
AMetal-4|net@186|||S1800|pin@70||-31|-24.5|pin@63||-30.5|-24.5
AP-Active|net@187|||S1800|pmos@4|diff-top|-5.75|-33.5|contact@72||-4.5|-33.5
AP-Active|net@188|||S1800|contact@72||-4.5|-33.5|pmos@5|diff-bottom|-3.25|-33.5
AP-Active|net@189|||S0|contact@74||5.5|-33.5|pmos@5|diff-top|4.25|-33.5
AN-Active|net@190|||S0|contact@75||5.5|-16.5|nmos@9|diff-bottom|4.25|-16.5
AN-Active|net@191|||S1800|contact@76||-14.5|-16.5|nmos@8|diff-top|-13.25|-16.5
AP-Active|net@192|||S1800|contact@77||-14.5|-33.5|pmos@4|diff-bottom|-13.25|-33.5
AN-Active|net@193|||S1800|contact@75||5.5|-16.5|nmos@10|diff-top|6.75|-16.5
AN-Active|net@194|||S0|contact@73||-4.5|-16.5|nmos@8|diff-bottom|-5.75|-16.5
AN-Active|net@195|||S1800|nmos@11|diff-bottom|-15.75|-16.5|contact@76||-14.5|-16.5
APolysilicon-1|net@196|||S2700|pmos@4|poly-right|-9.5|-29|contact@78||-9.5|-26.5
APolysilicon-1|net@197|||S900|nmos@8|poly-right|-9.5|-21|contact@78||-9.5|-26.5
APolysilicon-1|net@198|||S900|nmos@9|poly-right|0.5|-21|contact@79||0.5|-23.5
APolysilicon-1|net@199|||S2700|pmos@5|poly-right|0.5|-29|contact@79||0.5|-23.5
AMetal-2|net@200|||S1800|contact@80||-4.5|-37.5|pin@51||19.5|-37.5
AN-Active|net@201|||S1800|contact@73||-4.5|-16.5|nmos@9|diff-top|-3.25|-16.5
AMetal-1|net@202|||S900|contact@72||-4.5|-33.5|contact@80||-4.5|-36.5
AMetal-1|net@206|||S0|pin@53||7.5|-33.5|contact@74||5.5|-33.5
AMetal-1|net@207|||S2700|pin@52||7.5|-23.5|pin@54||7.5|-16.5
AMetal-1|net@208|||S0|pin@54||7.5|-16.5|contact@75||5.5|-16.5
AMetal-1|net@209|||S900|contact@91||-16.5|-23.5|pin@55||-16.5|-33.5
AMetal-1|net@210|||S1800|pin@55||-16.5|-33.5|contact@77||-14.5|-33.5
AMetal-1|net@211|||S2700|contact@91||-16.5|-23.5|pin@56||-16.5|-16.5
AMetal-1|net@212|||S1800|pin@56||-16.5|-16.5|contact@76||-14.5|-16.5
AMetal-1|net@213||1|S1800|contact@82||-9.5|-26.5|contact@78||-9.5|-26.5
AMetal-1|net@214||1|S1800|contact@83||0.5|-23.5|contact@79||0.5|-23.5
AMetal-1|net@215|||S|contact@84||-16.5|-23.5|contact@91||-16.5|-23.5
AMetal-1|net@216|||S900|pin@52||7.5|-23.5|contact@85||7.5|-26.5
AMetal-3|net@217|||S2700|pin@67||21.5|-9.5|pin@19||21.5|-4.5
AMetal-3|net@218|||S2700|pin@69||-30.5|-9.5|pin@21||-30.5|-4.5
AMetal-1|net@220|||S900|contact@9||-4.5|-8|contact@107||-4.5|-16.5
AN-Active|net@221|||S|contact@73||-4.5|-16.5|contact@107||-4.5|-16.5
AMetal-1|net@222|||S2700|contact@121||7.5|68|pin@76||7.5|75
AMetal-2|net@223||1|S1800|contact@122||-9.5|69|contact@123||-9.5|69
AMetal-1|net@224|||S|contact@114||-9.5|68|contact@123||-9.5|68
AMetal-3|net@225|||S900|pin@80||-9.5|71|contact@122||-9.5|69
AMetal-2|net@226||1|S0|contact@124||7.5|68|contact@121||7.5|68
AMetal-3|net@227|||S1800|pin@80||-9.5|71|pin@81||7.5|71
AMetal-3|net@228|||S900|pin@81||7.5|71|contact@124||7.5|68
AMetal-2|net@229||1|S2700|contact@125||0.5|64|contact@119||0.5|65
AMetal-3|net@230|||S900|contact@125||0.5|64|pin@82||0.5|62
AMetal-3|net@231|||S0|pin@82||0.5|62|pin@83||-16.5|62
AMetal-2|net@232|||S900|contact@126||-16.5|65|contact@127||-16.5|65
AMetal-3|net@233|||S2700|pin@83||-16.5|62|contact@126||-16.5|65
APolysilicon-1|net@234|||S1800|nmos@14|poly-right|10.5|62.5|pin@84||14.5|62.5
APolysilicon-1|net@235|||S2700|pin@84||14.5|62.5|contact@128||14.5|66
APolysilicon-1|net@236|||S0|nmos@15|poly-right|-19.5|62.5|pin@85||-23.5|62.5
APolysilicon-1|net@237|||S2700|pin@85||-23.5|62.5|contact@129||-23.5|66
AN-Active|net@238|||S1800|contact@130||-23.5|58|nmos@15|diff-top|-23.25|58
AN-Active|net@239|||S0|contact@131||14.5|58|nmos@14|diff-bottom|14.25|58
AMetal-4|net@240|||S1800|pin@86||-30.5|66|contact@132||-23.5|66
AMetal-3|net@241|||S1800|contact@132||-23.5|66|contact@133||-23.5|66
AMetal-2|net@242|||S1800|contact@133||-23.5|66|contact@134||-23.5|66
AMetal-1|net@243|||S|contact@129||-23.5|66|contact@134||-23.5|66
AMetal-4|net@244|||S1800|contact@132||-23.5|66|contact@135||14.5|66
AMetal-4|net@245|||S1800|contact@135||14.5|66|pin@87||21.5|66
AMetal-3|net@246|||S1800|contact@135||14.5|66|contact@136||14.5|66
AMetal-2|net@247|||S1800|contact@136||14.5|66|contact@137||14.5|66
AMetal-1|net@248|||S|contact@128||14.5|66|contact@137||14.5|66
AMetal-1|net@249||1|S0|contact@130||-23.5|58|pin@88||-28.5|58
AMetal-3|net@250|||S900|pin@89||21.5|79|contact@139||21.5|58
AMetal-3|net@251|||S900|contact@139||21.5|58|pin@90||21.5|51
AMetal-2|net@252|||S|contact@138||21.5|58|contact@139||21.5|58
AMetal-1|net@253||1|S1800|contact@131||14.5|58|contact@138||21.5|58
AMetal-3|net@254|||S900|pin@91||-30.5|79|contact@141||-30.5|58
AMetal-3|net@255|||S900|contact@141||-30.5|58|pin@92||-30.5|51
AMetal-2|net@256|||S1800|contact@140||-30.5|58|contact@141||-30.5|58
AMetal-1|net@257||1|S0|pin@88||-28.5|58|contact@140||-30.5|58
AMetal-2|net@258|||S1800|pin@71||-28.5|79|contact@142||-23.5|79
AMetal-2|net@259|||S1800|contact@142||-23.5|79|contact@116||-4.5|79
AMetal-1|net@260||1|S2700|well@2||-23.5|75|contact@142||-23.5|79
AMetal-4|net@261|||S1800|pin@93||-31|66|pin@86||-30.5|66
AP-Active|net@262|||S1800|pmos@6|diff-top|-5.75|75|contact@108||-4.5|75
AP-Active|net@263|||S1800|contact@108||-4.5|75|pmos@7|diff-bottom|-3.25|75
AP-Active|net@264|||S0|contact@110||5.5|75|pmos@7|diff-top|4.25|75
AN-Active|net@265|||S0|contact@111||5.5|58|nmos@13|diff-bottom|4.25|58
AN-Active|net@266|||S1800|contact@112||-14.5|58|nmos@12|diff-top|-13.25|58
AP-Active|net@267|||S1800|contact@113||-14.5|75|pmos@6|diff-bottom|-13.25|75
AN-Active|net@268|||S1800|contact@111||5.5|58|nmos@14|diff-top|6.75|58
AN-Active|net@269|||S0|contact@109||-4.5|58|nmos@12|diff-bottom|-5.75|58
AN-Active|net@270|||S1800|nmos@15|diff-bottom|-15.75|58|contact@112||-14.5|58
APolysilicon-1|net@271|||S900|pmos@6|poly-right|-9.5|70.5|contact@114||-9.5|68
APolysilicon-1|net@272|||S2700|nmos@12|poly-right|-9.5|62.5|contact@114||-9.5|68
APolysilicon-1|net@273|||S2700|nmos@13|poly-right|0.5|62.5|contact@115||0.5|65
APolysilicon-1|net@274|||S900|pmos@7|poly-right|0.5|70.5|contact@115||0.5|65
AMetal-2|net@275|||S1800|contact@116||-4.5|79|pin@74||19.5|79
AN-Active|net@276|||S1800|contact@109||-4.5|58|nmos@13|diff-top|-3.25|58
AMetal-1|net@277|||S2700|contact@108||-4.5|75|contact@116||-4.5|78
AMetal-1|net@281|||S0|pin@76||7.5|75|contact@110||5.5|75
AMetal-1|net@282|||S900|pin@75||7.5|65|pin@77||7.5|58
AMetal-1|net@283|||S0|pin@77||7.5|58|contact@111||5.5|58
AMetal-1|net@284|||S2700|contact@127||-16.5|65|pin@78||-16.5|75
AMetal-1|net@285|||S1800|pin@78||-16.5|75|contact@113||-14.5|75
AMetal-1|net@286|||S900|contact@127||-16.5|65|pin@79||-16.5|58
AMetal-1|net@287|||S1800|pin@79||-16.5|58|contact@112||-14.5|58
AMetal-1|net@288||1|S1800|contact@118||-9.5|68|contact@114||-9.5|68
AMetal-1|net@289||1|S1800|contact@119||0.5|65|contact@115||0.5|65
AMetal-1|net@290|||S|contact@120||-16.5|65|contact@127||-16.5|65
AMetal-1|net@291|||S2700|pin@75||7.5|65|contact@121||7.5|68
AMetal-3|net@292|||S900|pin@90||21.5|51|pin@42||21.5|46.5
AMetal-3|net@293|||S900|pin@92||-30.5|51|pin@44||-30.5|46.5
AMetal-1|net@294||1|S2700|contact@44||-4.5|51|contact@109||-4.5|58
X

290
final/SRAM_bits.cir Normal file
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@ -0,0 +1,290 @@
* This file contains all the subcircuits to be used in SRAM256.cir
***** long channel VTP = -0.9, VTN = 0.8 *****
*.include modelcard/1um.pm
*.param supply = 5
*.param ll = 1u
****** 50nm models***
.include ./modelcard/50nm.pm
.param supply =1
.param lambda=25nm
.param ll='2*lambda'
****** 16nm low power models***
*.include ./modelcard/PTM_LP/16nm.pm
*.param supply =0.9
*.param ll=16nm
****** 16nm high peformance models***
*.include ./modelcard/PTM_HP/16nm.pm
*.param supply =0.7
*.param ll=16nm
.subckt wire iot iof len=10 wid=10
.param rr=0.8
.param cc = '200e-15'
rt iot iof 'rr*len*50/(wid)'
cf iof 0 'cc*len*wid*50/1e6'
.ends
.subckt wire_dual lt rt lf rf len=10 wid=10
Xt lt rt wire len='len' wid='wid'
Xf lf rf wire len='len' wid='wid'
.ends
.subckt wire_precharge lt rt lf rf clk len=10 wid=10 ww=10
Xt lt rt wire len='len' wid='wid'
Xf lf rf wire len='len' wid='wid'
Xpt rt clk vdd pp ww='ww*2'
Xpf rf clk vdd pp ww='ww*2'
.ends
.subckt nn d g s ww=100
mnfet d g s 0 nmos L=ll w='ww*ll'
.ends
.subckt pp d g s ww=100
mpfet d g s vdd pmos L=ll w='ww*ll'
.ends
.subckt inv out inn size=30 beta=2
XPP out inn vdd pp ww='size*beta/(beta+1)'
XNN out inn gnd nn ww='size/(beta+1)'
.ends
.subckt nnd2 out in1 in0 size=30 beta=2
Xap0 out in0 vdd pp ww='beta*size/(beta+2)'
Xap1 out in1 vdd pp ww='beta*size/(beta+2)'
Xan0 out in0 nng nn ww='2*size/(beta+2)'
Xan1 nng in1 0 nn ww='2*size/(beta+2)'
.ends nnd2
.subckt nor2 out in1 in0 size=30 beta=2
Xap0 ppi in0 vdd pp ww='2*beta*size/(2*beta+1)'
Xap1 out in1 ppi pp ww='2*beta*size/(2*beta+1)'
Xan0 out in0 0 nn ww='1*size/(2*beta+1)'
Xan1 out in1 0 nn ww='1*size/(2*beta+1)'
.ends nor2
.subckt latch out inn clk clb size=15 beta=2
Xn inn clk qin nn ww='5'
Xp inn clb qin pp ww='10'
Xfp qin ggg vdd pp ww='5'
Xfn qin ggg gnd nn ww='5'
Xi ggg qin inv size='size'
Xo out ggg inv size='3*size'
.ends latch
.subckt flop qqq ddd clk
Xinve clb clk inv
Xflip int ddd clb clk latch
Xflop qqq int clk clb latch
.ends flop
.subckt reg8 ot7 ot6 ot5 ot4 ot3 ot2 ot1 ot0 in7 in6 in5 in4 in3 in2 in1 in0 clk
x7 ot7 in7 clk flop
x6 ot6 in6 clk flop
x5 ot5 in5 clk flop
x4 ot4 in4 clk flop
x3 ot3 in3 clk flop
x2 ot2 in2 clk flop
x1 ot1 in1 clk flop
x0 ot0 in0 clk flop
.ends reg8
.subckt dat1 out period=1ns start=1ns sz=50 total=5 duty=3
V0 j0 0 PULSE('supply' 0 'start' 10p 10p 'duty*period-10ps' 'total*period')
x7 out j0 inv size='sz'
.ends dat1
*generates different data stream on all eight channels, buffered output
.subckt dat8 o7 o6 o5 o4 o3 o2 o1 o0 per=1ns start=1ns size=50
V0 j0 0 PULSE(0 'supply' 'start' 10p 10p '0.5*per-10ps' 'per')
V1 j1 0 PULSE(0 'supply' 'start' 10p 10p '0.5*per-10ps' '2*per')
V2 j2 0 PULSE(0 'supply' 'start' 10p 10p '0.5*per-10ps' '3*per')
V3 j3 0 PULSE(0 'supply' 'start' 10p 10p '0.5*per-10ps' '4*per')
V4 j4 0 PULSE('supply' 0 'start' 10p 10p '0.5*per-10ps' '1*per')
V5 j5 0 PULSE('supply' 0 'start' 10p 10p '1*per-10ps' '2*per')
V6 j6 0 PULSE('supply' 0 'start' 10p 10p '1.5*per-10ps' '3*per')
V7 j7 0 PULSE('supply' 0 'start' 10p 10p '2*per-10ps' '4*per')
xb o7 o6 o5 o4 o3 o2 o1 o0 j7 j6 j5 j4 j3 j2 j1 j0 buf8 sz='size'
.ends dat8
.subckt buf8 ot7 ot6 ot5 ot4 ot3 ot2 ot1 ot0 in7 in6 in5 in4 in3 in2 in1 in0 sz=100
x7 ot7 in7 inv size='sz'
x6 ot6 in6 inv size='sz'
x5 ot5 in5 inv size='sz'
x4 ot4 in4 inv size='sz'
x3 ot3 in3 inv size='sz'
x2 ot2 in2 inv size='sz'
x1 ot1 in1 inv size='sz'
x0 ot0 in0 inv size='sz'
.ends buf8
.subckt nnd3 out in2 in1 in0 size=20 beta=2
Xp0 out in0 vdd pp ww='beta*size/(beta+3)'
Xp1 out in1 vdd pp ww='beta*size/(beta+3)'
Xp2 out in2 vdd pp ww='beta*size/(beta+3)'
Xn0 out in0 nn0 nn ww='3*size/(beta+3)'
Xn1 nn0 in1 nn1 nn ww='3*size/(beta+3)'
Xn2 nn1 in2 gnd nn ww='3*size/(beta+3)'
.ends
.subckt senseAmp ot1 ot0 in1 in0 eva size=40
Xn0 ot0 in0 ot1 eva nnd3 size ='size'
Xn1 ot1 in1 ot0 eva nnd3 size ='size'
.ends senseAmp
.subckt iSenseAmp ot1 ot0 in1 in0 eva size=40
Xp1 ot1 eva vdd pp ww='size'
Xp2 ot1 ot0 vdd pp ww='size'
Xp3 ot0 eva vdd pp ww='size'
Xp4 ot0 ot1 vdd pp ww='size'
Xn1 ot1 ot0 nn1 nn ww='size'
Xn2 ot0 ot1 nn0 nn ww='size'
Xn3 nn1 in1 pd nn ww='size'
Xn4 nn0 in0 pd nn ww='size'
Xn5 pd eva gnd nn ww='size'
.ends
.subckt precharge charge rwtb clk diib
Xrdi rdi rwtb diib nnd2
Xnn chargeb clk rdi nnd2
Xout charge chargeb inv
.ends precharge
.subckt write1 btt bff dii rwt clk
* TODO: sizes
Xclk clkb clk inv size='25'
Xdii diib dii inv size='25'
Xrwt rwtb rwt inv size='25'
Xrwn dorw clkb rwt nor2 size='50'
Xdt pdt dii gnd nn ww='100'
Xdf pdf diib gnd nn ww='100'
Xwt btt dorw pdt nn ww='100'
Xwf bff dorw pdf nn ww='100'
Xpcet pcet rwtb clk diib precharge
Xpcef pcef rwtb clk dii precharge
Xpct btt clk vdd pp ww='100'
Xpcf bff clk vdd pp ww='100'
.ends write1
.subckt iWrite1 btt bff dii rwt clk
* TODO: sizes
Xclk clkb clk inv size='40'
Xdii diib dii inv size='40'
Xrwt rwtb rwt inv size='40'
Xrwn dorw clkb rwt nor2 size='110'
Xdt pdt dii gnd nn ww='200'
Xdf pdf diib gnd nn ww='200'
Xwt btt dorw pdt nn ww='200'
Xwf bff dorw pdf nn ww='200'
Xpcet pcet rwtb clk diib precharge
Xpcef pcef rwtb clk dii precharge
Xpct btt pcet vdd pp ww='100'
Xpcf bff pcef vdd pp ww='100'
.ends write1
.subckt read1 btt bff dot rwt clk
Xnd trigger rwt clk nnd2
Xinv triggerb trigger inv
Xamp set reset btt bff triggerb senseAmp size='40'
Xinv1 set1 set inv
Xinv2 set2 set1 inv
Xinv3 reset1 reset inv
* Old setup:
* Xp nn1 set2 vdd pp
* Xn nn1 reset1 gnd nn
* Xh1 dot nn1 inv
* Xh2 nn1 dot inv
Xp dot set2 vdd pp
Xn dot reset1 gnd nn
Xh1 dot nn1 inv
Xh2 nn1 dot inv
.ends read1
.subckt readSub btt bff set rst rwt clk en
Xnd trigger rwt en clk nnd3
Xinv triggerb trigger inv size='40'
Xamp set rst btt bff triggerb senseAmp size='200'
.ends read1
.subckt iReadSub btt bff set rst rwt clk en
Xnd trigger rwt en clk nnd3
Xinv triggerb trigger inv size='40'
Xamp set rst btt bff triggerb iSenseAmp size='40'
.ends read1
.subckt readcollect dot set0 rst0 set1 rst1 set2 rst2 set3 rst3
Xset01 set01 set0 set1 nnd2
Xset23 set23 set2 set3 nnd2
Xrst01 rst01 rst0 rst1 nnd2
Xrst23 rst23 rst2 rst3 nnd2
Xnset01 nset01 set01 inv
Xnset23 nset23 set23 inv
Xp01 nn1 nset01 vdd pp
Xp23 nn1 nset23 vdd pp
Xn01 nn1 rst01 gnd nn
Xn23 nn1 rst23 gnd nn
Xh1 dot nn1 inv size='60'
Xh2 nn1 dot inv size='60'
.ends readCollect
.subckt decode2 o11 o10 o01 o00 di1 di0 df1 df0
.ends
.subckt decode_nor16
.ends
.subckt decode_nnd16
.ends
.subckt decode_16and1
.ends decode_16and1
.subckt dmux256 o255 o223 0012 o001 dt7 dt6 dt5 d4 dt3 dt1 dt0
.ends dmux256
.subckt decModel choose din clk size='20'
Xi1 nn1 din inv size='size'
* Here: stopped using i1 and just used din
Xnal ww1 gnd din nnd2 size='size'
Xnar nn2 vdd din nnd2 size='size'
Xnrl ww2 nn2 vdd nor2 size='size*3'
Xnrr nn3 nn2 gnd nor2 size='size'
Xna2l ww3 gnd nn3 nnd2 size='size*15'
Xna2r nn4 vdd nn3 nnd2 size='size'
Xi2 nn5 nn4 inv size='size'
Xnac nn6 nn5 clk nnd2 size='size'
Xi3 choose nn6 inv size='size'
.ends
.subckt mem1 bt bf ope
Xpt tt ff vdd pp ww='5'
Xnt tt ff gnd nn ww='5'
Xpf ff tt vdd pp ww='5'
Xnf ff tt gnd nn ww='5'
Xat bt ope tt nn ww='5'
Xaf bf ope ff nn ww='5'
.ends

87
final/report.tex Normal file
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\documentclass{article}
\usepackage[margin=1in]{geometry}
\usepackage{graphicx}
\usepackage{amsmath}
\title{Final Project Report}
\author{Danila Fedorin}
\begin{document}
\maketitle
\section*{General Design and Considerations}
The goal of this assignment was to create a 256-byte SRAM memory unit. In order
to minimize wire delays, I chose to split each bit into \textbf{4 columns of 64 SRAM cells
each}. This was motivated by the following factors:
\begin{itemize}
\item \emph{Larger} columns were eliminated due to the high cost of interconnect.
Even large write blocks were not able to charge the ``far ends'' of the wire
at shorter clock cycles. Increasing wire width did not help; although resistance
decreased, the capacitance increased, leading to small net gains. Thus, I made
the decision to shrink the columns as much as possible. However...
\item \emph{Smaller} columns became a routing challenge. Even with a 4-column split,
to properly connect each cell of the SRAM column, the SRAM cells themselves need
to accomodate an additional three \textsc{Wl} lines. Due to the pitch requirements
on metals three and four, this is the upper limit (for reasonably sized cells).
Alternatives included splitting the decoder into pieces, but for large numbers
of columns, this meant that the decoder signal traveled through significant amounts
of wire, and was thus slower.
\end{itemize}
For each of the 4 64-bit columns, I attached separate read and write blocks. However,
my placement of the write block was unorthodox. I observed that, although the write block
is perfectly capable of quickly manipulating the bitlines close to it, the changes
to the wires take too long to propagate through to the end. I addressed this with two separate
changes:
\begin{itemize}
\item I added \textbf{additional precharge transistors} along the column, a total of 4.
Each was sized at $5\lambda$, much like the SRAM transistors themselves. When the clock
was low, these PMOS transistors became transparent, and helped precharge the bitlines faster.
Doing so helped avid hysteresis. However, this did not help with writing during high clock,
so...
\item I also \textbf{placed the write block in the middle of the column}. This increased the distance
between my furthest SRAM cell and the read block (since the write block now contributed to wire
length). However, this made it significantly easier to drive the entire length of the wire,
which was my main bottleneck. This was because the maximum distance from the write
block to any cell in the column was halved. Since my read circuit continued to work in this
configuration, I did not place it in the middle of the column, as that would needlessly
increase the length of the wires.
\end{itemize}
This led to the configuration shown in Figure \ref{fig:top-design}. To simulate this design, I placed
a memory cell at the very top of my column, which is the furthest spot from both the read and write
circuit. I also split the wire into 4 equally-sized fragments, each with resistance $\frac{R}{4}$ and
capacitance $\frac{C}{4}$. Between each fragment, I added the aforementioned $5\lambda$ precharge
transistors, as well as 16 always-off $5\lambda$ transistors, which simulated the remaining memory cells.
I also placed \textsc{Din}, \textsc{Ad0}, and \textsc{Rwt} behind the default-sized flip-flops
attached to the clock to simulate something like a pipeline stage. My overall design is shown
in figure \ref{fig:top-design-sim}.
\pagebreak
\section*{Performance Results}
I made three measurements of my performance.
\begin{itemize}
\item Without flip-flopping my inputs and outputs, I was able to clock my design around
950\textit{ps}.
\item With flip-flops on my inputs (but not on my output), I was able to clock my design
around 1.24\textit{ns}. However, at this delay, the output of the gate came in very close to
the falling edge of the clock.
\item With flip-flops on my inputs and my outputs, I was able to clock my design at 2.6\textit{ns}.
This significant delay was to allow enough setup time for the flip flop.
\end{itemize}
%
Two factors lead to these upper limits.
%
\begin{itemize}
\item \textit{Write capacitance} makes it increasingly difficult to overwrite the value
in the cell. Clocking my design any faster than 950\textit{ps} or 1.24\textit{ns}
(depending on the case) leads my cell to \textit{almost} flip, but not resolve correctly.
I have found no way to work around these limits once my wire was properly sized, and my
write block was placed in the middle of the column.
\item \textit{Flop, decoder, and read delays} are the major limitation when both the inputs
and the outputs of the circuit are connected to flip flops. Even though the output
of the read block is correct, it doesn't arrive fast enough to be captured by the next cycle.
Furthermore, in some cases, the signal to open a memory cell arrives later than the
\textsc{Trig} signal for the senseamp, making it read too early and thus output the incorrect value.
\end{itemize}
\end{document}

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* File includes subcircuits and technology definitions
.include ./SRAM_bits.cir
*this cell emulates load from SRAM cells,
* Number refers to the load from than number of cells
.subckt memLoad ttt fff number=254
Xnt ttt gnd dead nn ww='number*5'
Xnf fff gnd dead nn ww='number*5'
.ends memLoad
*********begin: topLevel*****
* Parameters
.global gnd vdd
.param gnd=0
*********begin: topLevel*****
.param per = 1.33ns
.param dataLead=per*0.1
.param lw=2000
.param wirew=14
vdd vdd 0 'supply'
Xclok clk dat1 period='per' start='per+dataLead' total=1 duty=0.5 sz=300
Xad ad dat1 period='per' start='per' total=1 duty=0.5 sz=300
Xrdwr rdw dat1 period='3*per' start='2*per' total=2 duty=1 sz=300
Xdii din dat1 period='3*per' start='per' total=4 duty=2 sz=300
Xinv1 clkb1 clk inv
Xinv2 clkb2 clkb1 inv
Xinv3 clkb3 clkb2 inv
Xinv4 clkb4 clkb3 inv size='300'
Xinv5 clkb5 clkb4 inv
Xinv6 clkb6 clkb5 inv size='300'
Xad adf ad clk flop
Xdinff dinf din clk flop
Xrdwff rdwf rdw clk flop
Xrotff dotf dot clk flop
Xdec choose adf clk decModel
Xwr bt3 bf3 dinf rdwf clkb6 iWrite1
Xw1 bt1 bt2 bf1 bf2 clk wire_precharge len='lw/4' wid='wirew'
Xmd1 bt2 bf2 memLoad number=15
Xw2 bt2 bt3 bf2 bf3 clk wire_precharge len='lw/4' wid='wirew'
Xmd2 bt3 bf3 memLoad number=16
Xw3 bt3 bt4 bf3 bf4 clk wire_precharge len='lw/4' wid='wirew'
Xmd3 bt4 bf4 memLoad number=16
Xw4 bt4 btt bf4 bff clk wire_precharge len='lw/4' wid='wirew'
Xmd4 btt bff memLoad number =16
Xla bt1 bf1 choose mem1
Xrd btt bff set rst rdwf clk choose iReadSub
Xrc dot set rst vdd vdd vdd vdd vdd vdd readCollect
.ic V(la:tt)=0 V(la:ff)=1
.ic V(bt2)=1
.tran 1p 'per*20'
.meas tran dot_delay trig V(clk) val=0.8*supply rise=2 targ V(dot) val=0.8*supply rise=1

47
final/testDecoder.cir Normal file
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* File includes subcircuits and technology definitions
.include ./SRAM_bits.cir
*this cell emulates load from SRAM cells,
* Number refers to the load from than number of cells
.subckt memLoad ttt fff number=254
Xnt ttt gnd dead nn ww='number*5'
Xnf fff gnd dead nn ww='number*5'
.ends memLoad
*********begin: topLevel*****
* Parameters
.global gnd vdd
.param gnd=0
*********begin: topLevel*****
.param per = 5ns
.param lw=500
.param wirew=3
*DC supplies
vdd vdd 0 'supply'
Xclok clk dat1 period='per' start='per' total=1 duty=0.5 sz=120
Xbit ad0 dat1 period='per' start='0.5*per' total=3 duty=1
Xde ope ad0 clk decModel size=20
.tran 1p 25n

61
final/testMem.cir Normal file
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* File includes subcircuits and technology definitions
.include ./SRAM_bits.cir
*this cell emulates load from SRAM cells,
* Number refers to the load from than number of cells
.subckt memLoad ttt fff number=254
Xnt ttt gnd dead nn ww='number*5'
Xnf fff gnd dead nn ww='number*5'
.ends memLoad
*********begin: topLevel*****
* Parameters
.global gnd vdd
.param gnd=0
*********begin: topLevel*****
.param per = 5ns
.param lw=100
.param wirew=3
*DC supplies
vdd vdd 0 'supply'
Xclok clk dat1 period='0.5*per' total=1 duty=0.5 sz=120
Xdii dii dat1 period='per' start='per' total=3 duty=1
Xbit ad0 dat1 period='per' start='0.5*per' total=3 duty=1
Xde ope ad0 clk decModel size=20
* hardwire rdw signal to gnd
Xwr bt0 bf0 dii gnd clk write1
Xw0 bt0 bt1 bf0 bf1 wire_dual len='lw' wid='wirew'
* Place memory cell at end of wire
* First make sure it works with short wire and few memory cells
* View on plotter
*v(ope), v(dii)
*v(la:ff) v(la:tt)
*v(bf1) and v(bt1)
Xla bt1 bf1 ope mem1 m=1
Xmd bt1 bf1 memLoad number =254
*14.462274109131130
.tran 1p 50n

61
final/testRead.cir Normal file
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* File includes subcircuits and technology definitions
.include ./SRAM_bits.cir
*this cell emulates load from SRAM cells,
* Number refers to the load from than number of cells
.subckt memLoad ttt fff number=254
Xnt ttt gnd dead nn ww='number*5'
Xnf fff gnd dead nn ww='number*5'
.ends memLoad
*********begin: topLevel*****
* Parameters
.global gnd vdd
.param gnd=0
*********begin: topLevel*****
.param per = 3n
.param lw=5000
.param wirew=3
*DC supplies
vdd vdd 0 'supply'
Xclok clk dat1 period='per' start='per' total=1 duty=0.5 sz=120
Xrdwr rdw dat1 period='per' start='per' total=2 duty=1
Xdii dii dat1 period='per' start='per' total=3 duty=1
* vary
.param dip=0.05
Vt bt2 0 PULSE('supply''supply-dip' 'per' 10p 10p '2*per' '4*per')
Vf bf2 0 PULSE('supply-dip''supply' 'per' 10p 10p '2*per' '4*per')
Xbit ad0 dat1 period='per' start='0.5*per' total=3 duty=1
Xde ope ad0 clk decModel size=20
* Xrd bt2 bf2 dot vdd clk read1
Xrd bt2 bf2 set rst vdd clk readSub
.ic v(dot)=0
.tran 1p 50n

58
final/testSRAM.cir Normal file
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* File includes subcircuits and technology definitions
.include ./SRAM_bits.cir
*this cell emulates load from SRAM cells,
* Number refers to the load from than number of cells
.subckt memLoad ttt fff number=254
Xnt ttt gnd dead nn ww='number*5'
Xnf fff gnd dead nn ww='number*5'
.ends memLoad
*********begin: topLevel*****
* Parameters
.global gnd vdd
.param gnd=0
*********begin: topLevel*****
.param per = 100ns
.param lw=500
.param wirew=3
*DC supplies
vdd vdd 0 'supply'
Xclok clk dat1 period='0.5*per' total=1 duty=0.5 sz=120
Xrdwr rdw dat1 period='per' start='per' total=2 duty=1
*Vrdw rdw 0 'supply'
Xbit ad0 dat1 period='per' start='per' total=3 duty=1
Xdii dii dat1 period='4*per' total=1 duty=0.5 sz=120
Xacc acc dat1 period='per' start='per+10ps' total=2 duty=1
*
Xwr bt0 bf0 dii rdw clk write1
Xw0 bt0 bt1 bf0 bf1 wire_dual len='lw' wid='wirew'
Xla bt1 bf1 ope mem1
Xmd bt1 bf1 memLoad number =1
Xw1 bt1 bt2 bf1 bf2 wire_dual len='lw' wid='wirew'
Xrd bt2 bf2 dot rdw clk read1
Xde ope ad0 clk decModel size=10
.tran 1ps 1600ns

51
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* File includes subcircuits and technology definitions
.include ./SRAM_bits.cir
*this cell emulates load from SRAM cells,
* Number refers to the load from than number of cells
.subckt memLoad ttt fff number=254
Xnt ttt gnd dead nn ww='number*5'
Xnf fff gnd dead nn ww='number*5'
.ends memLoad
*********begin: topLevel*****
* Parameters
.global gnd vdd
.param gnd=0
*********begin: topLevel*****
.param per = 1ns
.param lw=500
.param wirew=3
*DC supplies
* make sure data signal is set up before clock signal triggers write
* possible NOR rdw and Clk, and then maybe delay clk?
* connect PMOS transistors to output of NOR gate, not directly to clk
vdd vdd 0 'supply'
Xclok clk dat1 period='per' start='per' total=1 duty=0.5 sz=120
Xrdwr rdw dat1 period='per' start='per' total=2 duty=1
Xdii dii dat1 period='per' start='per+0' total=3 duty=1
Xwr bt0 bf0 dii gnd clk write1
.tran 1p 15n

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* [x] Figure out the weird opAmp behavior
* [ ] Design cell with strict metal policies
* [ ] Add precharger version of memory cell (or explain how they compose)
* [ ] Test cell in the _middle_.
* [ ] Walk through the consequences of the read/write block being in the middle.