|
|
8ba9d02a8e
|
1.24ns
|
2021-03-15 16:02:04 -07:00 |
|
|
|
c866f63e8c
|
1.3 nanoseconds
|
2021-03-15 15:17:04 -07:00 |
|
|
|
f3ffb39219
|
Write-in-middle design.
|
2021-03-14 23:11:00 -07:00 |
|
|
|
f289e84389
|
Current best effort.
|
2021-03-14 21:13:43 -07:00 |
|
|
|
5f8a49ab9a
|
WIP (still buggy) 2ns design
|
2021-03-12 13:53:24 -08:00 |
|
|
|
2010fcdf52
|
Add initial version of SRAM design.
|
2021-03-09 19:15:39 -08:00 |
|
|
|
8285087e3f
|
Add Scott's various test files.
|
2021-03-09 19:15:28 -08:00 |
|
|
|
b58f4df33e
|
Add my initial definitions of SRAM bits.
|
2021-03-09 19:15:07 -08:00 |
|
